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author | BALATON Zoltan | 2020-06-21 13:12:38 +0200 |
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committer | Gerd Hoffmann | 2020-06-30 22:54:24 +0200 |
commit | 2bbcaa7cd67c30fc90d643f2fb490787b9d9627c (patch) | |
tree | a9f2b75bce8fb01632c32831f768507b6ce7d7fe /hw/display/ati_dbg.c | |
parent | ati-vga: Do not assert on error (diff) | |
download | qemu-2bbcaa7cd67c30fc90d643f2fb490787b9d9627c.tar.gz qemu-2bbcaa7cd67c30fc90d643f2fb490787b9d9627c.tar.xz qemu-2bbcaa7cd67c30fc90d643f2fb490787b9d9627c.zip |
ati-vga: Add dummy MEM_SDRAM_MODE_REG
Radeon chips have an SDRAM mode reg that is accessed by some drivers.
We don't emulate the memory controller but provide some default value
to prevent drivers getting unexpected 0.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-id: cc1324b9ef06beb8ae233ddc77dedd8bab9b8624.1592737958.git.balaton@eik.bme.hu
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Diffstat (limited to 'hw/display/ati_dbg.c')
-rw-r--r-- | hw/display/ati_dbg.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/hw/display/ati_dbg.c b/hw/display/ati_dbg.c index 0ebbd36f14..bd0ecd48c7 100644 --- a/hw/display/ati_dbg.c +++ b/hw/display/ati_dbg.c @@ -42,6 +42,7 @@ static struct ati_regdesc ati_reg_names[] = { {"MC_FB_LOCATION", 0x0148}, {"MC_AGP_LOCATION", 0x014C}, {"MC_STATUS", 0x0150}, + {"MEM_SDRAM_MODE_REG", 0x0158}, {"MEM_POWER_MISC", 0x015c}, {"AGP_BASE", 0x0170}, {"AGP_CNTL", 0x0174}, |