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authorPhilippe Mathieu-Daudé2020-09-03 10:08:29 +0200
committerPhilippe Mathieu-Daudé2021-12-30 17:16:32 +0100
commitba06fe8add5b788956a7317246c6280dfc157040 (patch)
treeac45cbe188581ffab75d060e0eec843515f8ec32 /hw/dma
parentdma: Let dma_memory_rw() take MemTxAttrs argument (diff)
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dma: Let dma_memory_read/write() take MemTxAttrs argument
Let devices specify transaction attributes when calling dma_memory_read() or dma_memory_write(). Patch created mechanically using spatch with this script: @@ expression E1, E2, E3, E4; @@ ( - dma_memory_read(E1, E2, E3, E4) + dma_memory_read(E1, E2, E3, E4, MEMTXATTRS_UNSPECIFIED) | - dma_memory_write(E1, E2, E3, E4) + dma_memory_write(E1, E2, E3, E4, MEMTXATTRS_UNSPECIFIED) ) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Li Qiang <liq3ea@gmail.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Stefan Hajnoczi <stefanha@redhat.com> Message-Id: <20211223115554.3155328-6-philmd@redhat.com>
Diffstat (limited to 'hw/dma')
-rw-r--r--hw/dma/pl330.c12
-rw-r--r--hw/dma/sparc32_dma.c16
-rw-r--r--hw/dma/xlnx-zynq-devcfg.c6
-rw-r--r--hw/dma/xlnx_dpdma.c10
4 files changed, 28 insertions, 16 deletions
diff --git a/hw/dma/pl330.c b/hw/dma/pl330.c
index 0cb46191c1..31ce01b7c5 100644
--- a/hw/dma/pl330.c
+++ b/hw/dma/pl330.c
@@ -1111,7 +1111,8 @@ static inline const PL330InsnDesc *pl330_fetch_insn(PL330Chan *ch)
uint8_t opcode;
int i;
- dma_memory_read(ch->parent->mem_as, ch->pc, &opcode, 1);
+ dma_memory_read(ch->parent->mem_as, ch->pc, &opcode, 1,
+ MEMTXATTRS_UNSPECIFIED);
for (i = 0; insn_desc[i].size; i++) {
if ((opcode & insn_desc[i].opmask) == insn_desc[i].opcode) {
return &insn_desc[i];
@@ -1125,7 +1126,8 @@ static inline void pl330_exec_insn(PL330Chan *ch, const PL330InsnDesc *insn)
uint8_t buf[PL330_INSN_MAXSIZE];
assert(insn->size <= PL330_INSN_MAXSIZE);
- dma_memory_read(ch->parent->mem_as, ch->pc, buf, insn->size);
+ dma_memory_read(ch->parent->mem_as, ch->pc, buf, insn->size,
+ MEMTXATTRS_UNSPECIFIED);
insn->exec(ch, buf[0], &buf[1], insn->size - 1);
}
@@ -1189,7 +1191,8 @@ static int pl330_exec_cycle(PL330Chan *channel)
if (q != NULL && q->len <= pl330_fifo_num_free(&s->fifo)) {
int len = q->len - (q->addr & (q->len - 1));
- dma_memory_read(s->mem_as, q->addr, buf, len);
+ dma_memory_read(s->mem_as, q->addr, buf, len,
+ MEMTXATTRS_UNSPECIFIED);
trace_pl330_exec_cycle(q->addr, len);
if (trace_event_get_state_backends(TRACE_PL330_HEXDUMP)) {
pl330_hexdump(buf, len);
@@ -1220,7 +1223,8 @@ static int pl330_exec_cycle(PL330Chan *channel)
fifo_res = pl330_fifo_get(&s->fifo, buf, len, q->tag);
}
if (fifo_res == PL330_FIFO_OK || q->z) {
- dma_memory_write(s->mem_as, q->addr, buf, len);
+ dma_memory_write(s->mem_as, q->addr, buf, len,
+ MEMTXATTRS_UNSPECIFIED);
trace_pl330_exec_cycle(q->addr, len);
if (trace_event_get_state_backends(TRACE_PL330_HEXDUMP)) {
pl330_hexdump(buf, len);
diff --git a/hw/dma/sparc32_dma.c b/hw/dma/sparc32_dma.c
index 03bc500878..0ef13c5e9a 100644
--- a/hw/dma/sparc32_dma.c
+++ b/hw/dma/sparc32_dma.c
@@ -81,11 +81,11 @@ void ledma_memory_read(void *opaque, hwaddr addr,
addr |= s->dmaregs[3];
trace_ledma_memory_read(addr, len);
if (do_bswap) {
- dma_memory_read(&is->iommu_as, addr, buf, len);
+ dma_memory_read(&is->iommu_as, addr, buf, len, MEMTXATTRS_UNSPECIFIED);
} else {
addr &= ~1;
len &= ~1;
- dma_memory_read(&is->iommu_as, addr, buf, len);
+ dma_memory_read(&is->iommu_as, addr, buf, len, MEMTXATTRS_UNSPECIFIED);
for(i = 0; i < len; i += 2) {
bswap16s((uint16_t *)(buf + i));
}
@@ -103,7 +103,8 @@ void ledma_memory_write(void *opaque, hwaddr addr,
addr |= s->dmaregs[3];
trace_ledma_memory_write(addr, len);
if (do_bswap) {
- dma_memory_write(&is->iommu_as, addr, buf, len);
+ dma_memory_write(&is->iommu_as, addr, buf, len,
+ MEMTXATTRS_UNSPECIFIED);
} else {
addr &= ~1;
len &= ~1;
@@ -114,7 +115,8 @@ void ledma_memory_write(void *opaque, hwaddr addr,
for(i = 0; i < l; i += 2) {
tmp_buf[i >> 1] = bswap16(*(uint16_t *)(buf + i));
}
- dma_memory_write(&is->iommu_as, addr, tmp_buf, l);
+ dma_memory_write(&is->iommu_as, addr, tmp_buf, l,
+ MEMTXATTRS_UNSPECIFIED);
len -= l;
buf += l;
addr += l;
@@ -148,7 +150,8 @@ void espdma_memory_read(void *opaque, uint8_t *buf, int len)
IOMMUState *is = (IOMMUState *)s->iommu;
trace_espdma_memory_read(s->dmaregs[1], len);
- dma_memory_read(&is->iommu_as, s->dmaregs[1], buf, len);
+ dma_memory_read(&is->iommu_as, s->dmaregs[1], buf, len,
+ MEMTXATTRS_UNSPECIFIED);
s->dmaregs[1] += len;
}
@@ -158,7 +161,8 @@ void espdma_memory_write(void *opaque, uint8_t *buf, int len)
IOMMUState *is = (IOMMUState *)s->iommu;
trace_espdma_memory_write(s->dmaregs[1], len);
- dma_memory_write(&is->iommu_as, s->dmaregs[1], buf, len);
+ dma_memory_write(&is->iommu_as, s->dmaregs[1], buf, len,
+ MEMTXATTRS_UNSPECIFIED);
s->dmaregs[1] += len;
}
diff --git a/hw/dma/xlnx-zynq-devcfg.c b/hw/dma/xlnx-zynq-devcfg.c
index e33112b6f0..f5ad1a0d22 100644
--- a/hw/dma/xlnx-zynq-devcfg.c
+++ b/hw/dma/xlnx-zynq-devcfg.c
@@ -161,12 +161,14 @@ static void xlnx_zynq_devcfg_dma_go(XlnxZynqDevcfg *s)
btt = MIN(btt, dmah->dest_len);
}
DB_PRINT("reading %x bytes from %x\n", btt, dmah->src_addr);
- dma_memory_read(&address_space_memory, dmah->src_addr, buf, btt);
+ dma_memory_read(&address_space_memory, dmah->src_addr, buf, btt,
+ MEMTXATTRS_UNSPECIFIED);
dmah->src_len -= btt;
dmah->src_addr += btt;
if (loopback && (dmah->src_len || dmah->dest_len)) {
DB_PRINT("writing %x bytes from %x\n", btt, dmah->dest_addr);
- dma_memory_write(&address_space_memory, dmah->dest_addr, buf, btt);
+ dma_memory_write(&address_space_memory, dmah->dest_addr, buf, btt,
+ MEMTXATTRS_UNSPECIFIED);
dmah->dest_len -= btt;
dmah->dest_addr += btt;
}
diff --git a/hw/dma/xlnx_dpdma.c b/hw/dma/xlnx_dpdma.c
index 967548abd3..2d7eae72cd 100644
--- a/hw/dma/xlnx_dpdma.c
+++ b/hw/dma/xlnx_dpdma.c
@@ -652,7 +652,7 @@ size_t xlnx_dpdma_start_operation(XlnxDPDMAState *s, uint8_t channel,
}
if (dma_memory_read(&address_space_memory, desc_addr, &desc,
- sizeof(DPDMADescriptor))) {
+ sizeof(DPDMADescriptor), MEMTXATTRS_UNSPECIFIED)) {
s->registers[DPDMA_EISR] |= ((1 << 1) << channel);
xlnx_dpdma_update_irq(s);
s->operation_finished[channel] = true;
@@ -708,7 +708,8 @@ size_t xlnx_dpdma_start_operation(XlnxDPDMAState *s, uint8_t channel,
if (dma_memory_read(&address_space_memory,
source_addr[0],
&s->data[channel][ptr],
- line_size)) {
+ line_size,
+ MEMTXATTRS_UNSPECIFIED)) {
s->registers[DPDMA_ISR] |= ((1 << 12) << channel);
xlnx_dpdma_update_irq(s);
DPRINTF("Can't get data.\n");
@@ -736,7 +737,8 @@ size_t xlnx_dpdma_start_operation(XlnxDPDMAState *s, uint8_t channel,
if (dma_memory_read(&address_space_memory,
source_addr[frag],
&(s->data[channel][ptr]),
- fragment_len)) {
+ fragment_len,
+ MEMTXATTRS_UNSPECIFIED)) {
s->registers[DPDMA_ISR] |= ((1 << 12) << channel);
xlnx_dpdma_update_irq(s);
DPRINTF("Can't get data.\n");
@@ -754,7 +756,7 @@ size_t xlnx_dpdma_start_operation(XlnxDPDMAState *s, uint8_t channel,
DPRINTF("update the descriptor with the done flag set.\n");
xlnx_dpdma_desc_set_done(&desc);
dma_memory_write(&address_space_memory, desc_addr, &desc,
- sizeof(DPDMADescriptor));
+ sizeof(DPDMADescriptor), MEMTXATTRS_UNSPECIFIED);
}
if (xlnx_dpdma_desc_completion_interrupt(&desc)) {