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| author | Peter Maydell | 2021-07-02 12:40:16 +0200 |
|---|---|---|
| committer | Peter Maydell | 2021-07-09 17:09:12 +0200 |
| commit | ef4989b0a898ae20a974d261b14d4e5c1c097292 (patch) | |
| tree | 5b454d45a858580d48f5d4a98296f3b4a246f964 /hw/gpio/trace-events | |
| parent | hw/arm/virt: Make PL061 GPIO lines pulled low, not high (diff) | |
| download | qemu-ef4989b0a898ae20a974d261b14d4e5c1c097292.tar.gz qemu-ef4989b0a898ae20a974d261b14d4e5c1c097292.tar.xz qemu-ef4989b0a898ae20a974d261b14d4e5c1c097292.zip | |
hw/gpio/pl061: Convert to 3-phase reset and assert GPIO lines correctly on reset
The PL061 comes out of reset with all its lines configured as input,
which means they might need to be pulled to 0 or 1 depending on the
'pullups' and 'pulldowns' properties. Currently we do not assert
these lines on reset; they will only be set whenever the guest first
touches a register that triggers a call to pl061_update().
Convert the device to three-phase reset so we have a place where we
can safely call qemu_set_irq() to set the floating lines to their
correct values.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'hw/gpio/trace-events')
| -rw-r--r-- | hw/gpio/trace-events | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/hw/gpio/trace-events b/hw/gpio/trace-events index eb5fb4701c..1dab99c560 100644 --- a/hw/gpio/trace-events +++ b/hw/gpio/trace-events @@ -20,6 +20,7 @@ pl061_input_change(const char *id, int gpio, int level) "%s input %d changed to pl061_update_istate(const char *id, uint32_t istate, uint32_t im, int level) "%s GPIORIS 0x%x GPIOIE 0x%x interrupt level %d" pl061_read(const char *id, uint64_t offset, uint64_t r) "%s offset 0x%" PRIx64 " value 0x%" PRIx64 pl061_write(const char *id, uint64_t offset, uint64_t value) "%s offset 0x%" PRIx64 " value 0x%" PRIx64 +pl061_reset(const char *id) "%s reset" # sifive_gpio.c sifive_gpio_read(uint64_t offset, uint64_t r) "offset 0x%" PRIx64 " value 0x%" PRIx64 |