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author | Philippe Mathieu-Daudé | 2020-06-17 09:25:29 +0200 |
---|---|---|
committer | Peter Maydell | 2020-06-23 12:39:47 +0200 |
commit | f61c3fb56bfad1d76422fa80d18ae5e39a47d61d (patch) | |
tree | ab4cda3786a4af9048a56f445145378bd9489b6f /hw/i2c/versatile_i2c.c | |
parent | hw/i2c/versatile_i2c: Add SCL/SDA definitions (diff) | |
download | qemu-f61c3fb56bfad1d76422fa80d18ae5e39a47d61d.tar.gz qemu-f61c3fb56bfad1d76422fa80d18ae5e39a47d61d.tar.xz qemu-f61c3fb56bfad1d76422fa80d18ae5e39a47d61d.zip |
hw/i2c: Add header for ARM SBCon two-wire serial bus interface
'ARM SBCon two-wire serial bus interface' is the official
name describing the pair of registers used to bitbanging
I2C in the Versatile boards.
Make the private VersatileI2CState structure as public
ArmSbconI2CState.
Add the TYPE_ARM_SBCON_I2C, alias to our current
TYPE_VERSATILE_I2C model.
Rename the memory region description as 'arm_sbcon_i2c'.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20200617072539.32686-5-f4bug@amsat.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/i2c/versatile_i2c.c')
-rw-r--r-- | hw/i2c/versatile_i2c.c | 17 |
1 files changed, 5 insertions, 12 deletions
diff --git a/hw/i2c/versatile_i2c.c b/hw/i2c/versatile_i2c.c index 0ce10a1bcc..da8cda2ec1 100644 --- a/hw/i2c/versatile_i2c.c +++ b/hw/i2c/versatile_i2c.c @@ -1,5 +1,6 @@ /* - * ARM Versatile I2C controller + * ARM SBCon two-wire serial bus interface (I2C bitbang) + * a.k.a. ARM Versatile I2C controller * * Copyright (c) 2006-2007 CodeSourcery. * Copyright (c) 2012 Oskar Andero <oskar.andero@gmail.com> @@ -22,24 +23,16 @@ */ #include "qemu/osdep.h" -#include "hw/sysbus.h" -#include "hw/i2c/bitbang_i2c.h" +#include "hw/i2c/arm_sbcon_i2c.h" #include "hw/registerfields.h" #include "qemu/log.h" #include "qemu/module.h" -#define TYPE_VERSATILE_I2C "versatile_i2c" #define VERSATILE_I2C(obj) \ OBJECT_CHECK(VersatileI2CState, (obj), TYPE_VERSATILE_I2C) -typedef struct VersatileI2CState { - SysBusDevice parent_obj; +typedef ArmSbconI2CState VersatileI2CState; - MemoryRegion iomem; - bitbang_i2c_interface bitbang; - int out; - int in; -} VersatileI2CState; REG32(CONTROL_GET, 0) REG32(CONTROL_SET, 0) @@ -99,7 +92,7 @@ static void versatile_i2c_init(Object *obj) bus = i2c_init_bus(dev, "i2c"); bitbang_i2c_init(&s->bitbang, bus); memory_region_init_io(&s->iomem, obj, &versatile_i2c_ops, s, - "versatile_i2c", 0x1000); + "arm_sbcon_i2c", 0x1000); sysbus_init_mmio(sbd, &s->iomem); } |