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| author | Qi, Yadong | 2019-11-25 01:33:21 +0100 |
|---|---|---|
| committer | Michael S. Tsirkin | 2019-11-25 09:42:58 +0100 |
| commit | e48929c787ed0ebed87877c97ac90c3a47ef7dda (patch) | |
| tree | 7894d1ab27d7efbb28dabe48063a3d2f764cf888 /hw/i386/e820_memory_layout.c | |
| parent | intel_iommu: refine SL-PEs reserved fields checking (diff) | |
| download | qemu-e48929c787ed0ebed87877c97ac90c3a47ef7dda.tar.gz qemu-e48929c787ed0ebed87877c97ac90c3a47ef7dda.tar.xz qemu-e48929c787ed0ebed87877c97ac90c3a47ef7dda.zip | |
intel_iommu: TM field should not be in reserved bits
When dt is supported, TM field should not be Reserved(0).
Refer to VT-d Spec 9.8
Signed-off-by: Zhang, Qi <qi1.zhang@intel.com>
Signed-off-by: Qi, Yadong <yadong.qi@intel.com>
Message-Id: <20191125003321.5669-3-yadong.qi@intel.com>
Reviewed-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/i386/e820_memory_layout.c')
0 files changed, 0 insertions, 0 deletions