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| author | Peter Maydell | 2020-07-09 15:13:19 +0200 |
|---|---|---|
| committer | Peter Maydell | 2020-07-09 15:13:19 +0200 |
| commit | 3d7cad3c2388cb74451d50cf455a42d349236161 (patch) | |
| tree | e700ca3dfe1753a768fbbca069ab76b1fc7709e3 /hw/i386/intel_iommu.c | |
| parent | Merge remote-tracking branch 'remotes/vivier/tags/m68k-next-pull-request' int... (diff) | |
| parent | net/tap-solaris.c: Include qemu-common.h for TFR macro (diff) | |
| download | qemu-3d7cad3c2388cb74451d50cf455a42d349236161.tar.gz qemu-3d7cad3c2388cb74451d50cf455a42d349236161.tar.xz qemu-3d7cad3c2388cb74451d50cf455a42d349236161.zip | |
Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-5.1-pull-request' into staging
trivial branch patches 20200707
# gpg: Signature made Tue 07 Jul 2020 11:52:06 BST
# gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg: issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C
* remotes/vivier2/tags/trivial-branch-for-5.1-pull-request:
net/tap-solaris.c: Include qemu-common.h for TFR macro
intel_iommu: "aw-bits" error message still refers to "x-aw-bits"
util/qemu-option: Document the get_opt_value() function
MAINTAINERS: Update Radoslaw Biernacki email address
.mailmap: Update Alexander Graf email address
trivial: Respect alphabetical order of .o files in Makefile.objs
fix the prototype of muls64/mulu64
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/i386/intel_iommu.c')
| -rw-r--r-- | hw/i386/intel_iommu.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index df7ad254ac..c56398e991 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -3758,7 +3758,7 @@ static bool vtd_decide_config(IntelIOMMUState *s, Error **errp) /* Currently only address widths supported are 39 and 48 bits */ if ((s->aw_bits != VTD_HOST_AW_39BIT) && (s->aw_bits != VTD_HOST_AW_48BIT)) { - error_setg(errp, "Supported values for x-aw-bits are: %d, %d", + error_setg(errp, "Supported values for aw-bits are: %d, %d", VTD_HOST_AW_39BIT, VTD_HOST_AW_48BIT); return false; } |