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authorPhilippe Mathieu-Daudé2019-10-18 15:59:06 +0200
committerPaolo Bonzini2019-10-24 14:24:34 +0200
commit417258f139e61899511d6a99c11b276f12bbbd86 (patch)
tree4b50ae2728c7704261092dab0d27cd5940914df7 /hw/i386/pc.c
parenttarget/i386: Add support for save/load IA32_UMWAIT_CONTROL MSR (diff)
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hw/i386/pc: Extract pc_gsi_create()
The GSI creation code is common to all PC machines, extract the common code. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20191018135910.24286-2-philmd@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'hw/i386/pc.c')
-rw-r--r--hw/i386/pc.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index a8888dd622..e8a54acc38 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -355,6 +355,21 @@ void gsi_handler(void *opaque, int n, int level)
qemu_set_irq(s->ioapic_irq[n], level);
}
+GSIState *pc_gsi_create(qemu_irq **irqs, bool pci_enabled)
+{
+ GSIState *s;
+
+ s = g_new0(GSIState, 1);
+ if (kvm_ioapic_in_kernel()) {
+ kvm_pc_setup_irq_routing(pci_enabled);
+ *irqs = qemu_allocate_irqs(kvm_pc_gsi_handler, s, GSI_NUM_PINS);
+ } else {
+ *irqs = qemu_allocate_irqs(gsi_handler, s, GSI_NUM_PINS);
+ }
+
+ return s;
+}
+
static void ioport80_write(void *opaque, hwaddr addr, uint64_t data,
unsigned size)
{