diff options
| author | Peter Xu | 2016-07-14 07:56:23 +0200 |
|---|---|---|
| committer | Michael S. Tsirkin | 2016-07-21 19:43:49 +0200 |
| commit | cb135f59b8059c3a372652377ef92fa4a49ad550 (patch) | |
| tree | 244cb6772ba2773c137cc781d96375083f381d89 /hw/i386 | |
| parent | intel_iommu: get rid of {0} initializers (diff) | |
| download | qemu-cb135f59b8059c3a372652377ef92fa4a49ad550.tar.gz qemu-cb135f59b8059c3a372652377ef92fa4a49ad550.tar.xz qemu-cb135f59b8059c3a372652377ef92fa4a49ad550.zip | |
q35: ioapic: add support for emulated IOAPIC IR
This patch translates all IOAPIC interrupts into MSI ones. One pseudo
ioapic address space is added to transfer the MSI message. By default,
it will be system memory address space. When IR is enabled, it will be
IOMMU address space.
Currently, only emulated IOAPIC is supported.
Idea suggested by Jan Kiszka and Rita Sinha in the following patch:
https://lists.gnu.org/archive/html/qemu-devel/2016-03/msg01933.html
Signed-off-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/i386')
| -rw-r--r-- | hw/i386/intel_iommu.c | 6 | ||||
| -rw-r--r-- | hw/i386/pc.c | 3 |
2 files changed, 8 insertions, 1 deletions
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index ccfcc69347..6ba5520283 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -28,6 +28,7 @@ #include "hw/i386/pc.h" #include "hw/boards.h" #include "hw/i386/x86-iommu.h" +#include "hw/pci-host/q35.h" /*#define DEBUG_INTEL_IOMMU*/ #ifdef DEBUG_INTEL_IOMMU @@ -2367,7 +2368,8 @@ static AddressSpace *vtd_host_dma_iommu(PCIBus *bus, void *opaque, int devfn) static void vtd_realize(DeviceState *dev, Error **errp) { - PCIBus *bus = PC_MACHINE(qdev_get_machine())->bus; + PCMachineState *pcms = PC_MACHINE(qdev_get_machine()); + PCIBus *bus = pcms->bus; IntelIOMMUState *s = INTEL_IOMMU_DEVICE(dev); VTD_DPRINTF(GENERAL, ""); @@ -2383,6 +2385,8 @@ static void vtd_realize(DeviceState *dev, Error **errp) vtd_init(s); sysbus_mmio_map(SYS_BUS_DEVICE(s), 0, Q35_HOST_BRIDGE_IOMMU_ADDR); pci_setup_iommu(bus, vtd_host_dma_iommu, dev); + /* Pseudo address space under root PCI bus. */ + pcms->ioapic_as = vtd_host_dma_iommu(bus, s, Q35_PSEUDO_DEVFN_IOAPIC); } static void vtd_class_init(ObjectClass *klass, void *data) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 719884ff88..979f36d99f 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1475,6 +1475,9 @@ void pc_memory_init(PCMachineState *pcms, rom_add_option(option_rom[i].name, option_rom[i].bootindex); } pcms->fw_cfg = fw_cfg; + + /* Init default IOAPIC address space */ + pcms->ioapic_as = &address_space_memory; } qemu_irq pc_allocate_cpu_irq(void) |