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| author | Peter Maydell | 2018-08-20 12:24:32 +0200 |
|---|---|---|
| committer | Peter Maydell | 2018-08-20 12:24:32 +0200 |
| commit | 55c544ed2709bd202e71e77ddfe3ea0327852211 (patch) | |
| tree | a8bf1b793be3127a81e761fa43845d631e20bb5a /hw/ide/ich.c | |
| parent | target/arm: Permit accesses to ELR_Hyp from Hyp mode via MSR/MRS (banked) (diff) | |
| download | qemu-55c544ed2709bd202e71e77ddfe3ea0327852211.tar.gz qemu-55c544ed2709bd202e71e77ddfe3ea0327852211.tar.xz qemu-55c544ed2709bd202e71e77ddfe3ea0327852211.zip | |
target/arm: Implement AArch32 ERET instruction
ARMv7VE introduced the ERET instruction, which is necessary to
return from an exception taken to Hyp mode. Implement this.
In A32 encoding it is a completely new encoding; in T32 it
is an adjustment of the behaviour of the existing
"SUBS PC, LR, #<imm8>" instruction.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Luc Michel <luc.michel@greensocs.com>
Message-id: 20180814124254.5229-10-peter.maydell@linaro.org
Diffstat (limited to 'hw/ide/ich.c')
0 files changed, 0 insertions, 0 deletions