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author | Lev Kujawski | 2022-07-07 05:11:34 +0200 |
---|---|---|
committer | Kevin Wolf | 2022-09-30 18:43:44 +0200 |
commit | 4851a986b205ac8fb133164cd15d9bb983d8502d (patch) | |
tree | afb666f69068cb51c4011196c1cc0c43d94803bd /hw/ide | |
parent | block: use the request length for iov alignment (diff) | |
download | qemu-4851a986b205ac8fb133164cd15d9bb983d8502d.tar.gz qemu-4851a986b205ac8fb133164cd15d9bb983d8502d.tar.xz qemu-4851a986b205ac8fb133164cd15d9bb983d8502d.zip |
piix_ide_reset: Use pci_set_* functions instead of direct access
Eliminate the remaining TODOs in hw/ide/piix.c by:
* Using pci_set_{size} functions to write the PIIX PCI configuration
space instead of manipulating it directly as an array; and
* Documenting the default register values by reference to the
controlling specification.
Signed-off-by: Lev Kujawski <lkujaw@member.fsf.org>
Message-Id: <20220707031140.158958-1-lkujaw@member.fsf.org>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Diffstat (limited to 'hw/ide')
-rw-r--r-- | hw/ide/piix.c | 17 |
1 files changed, 9 insertions, 8 deletions
diff --git a/hw/ide/piix.c b/hw/ide/piix.c index 9a9b28078e..de1f4f0efb 100644 --- a/hw/ide/piix.c +++ b/hw/ide/piix.c @@ -21,6 +21,10 @@ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. + * + * References: + * [1] 82371FB (PIIX) AND 82371SB (PIIX3) PCI ISA IDE XCELERATOR, + * 290550-002, Intel Corporation, April 1997. */ #include "qemu/osdep.h" @@ -114,14 +118,11 @@ static void piix_ide_reset(DeviceState *dev) ide_bus_reset(&d->bus[i]); } - /* TODO: this is the default. do not override. */ - pci_conf[PCI_COMMAND] = 0x00; - /* TODO: this is the default. do not override. */ - pci_conf[PCI_COMMAND + 1] = 0x00; - /* TODO: use pci_set_word */ - pci_conf[PCI_STATUS] = PCI_STATUS_FAST_BACK; - pci_conf[PCI_STATUS + 1] = PCI_STATUS_DEVSEL_MEDIUM >> 8; - pci_conf[0x20] = 0x01; /* BMIBA: 20-23h */ + /* PCI command register default value (0000h) per [1, p.48]. */ + pci_set_word(pci_conf + PCI_COMMAND, 0x0000); + pci_set_word(pci_conf + PCI_STATUS, + PCI_STATUS_DEVSEL_MEDIUM | PCI_STATUS_FAST_BACK); + pci_set_byte(pci_conf + 0x20, 0x01); /* BMIBA: 20-23h */ } static int pci_piix_init_ports(PCIIDEState *d) |