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author | Bin Meng | 2020-09-03 12:40:15 +0200 |
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committer | Alistair Francis | 2020-09-10 00:54:19 +0200 |
commit | 4921a0ce86cecd03e6918832673db79de62e6fe1 (patch) | |
tree | 5da8decc3b08809b7f5fdaddedb25d5e43fd8166 /hw/intc/Kconfig | |
parent | hw/riscv: Move sifive_u_otp model to hw/misc (diff) | |
download | qemu-4921a0ce86cecd03e6918832673db79de62e6fe1.tar.gz qemu-4921a0ce86cecd03e6918832673db79de62e6fe1.tar.xz qemu-4921a0ce86cecd03e6918832673db79de62e6fe1.zip |
hw/riscv: Move sifive_gpio model to hw/gpio
This is an effort to clean up the hw/riscv directory. Ideally it
should only contain the RISC-V SoC / machine codes plus generic
codes. Let's move sifive_gpio model to hw/gpio directory.
Note this also removes the trace-events in the hw/riscv directory,
since gpio is the only supported trace target in that directory.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <1599129623-68957-5-git-send-email-bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw/intc/Kconfig')
0 files changed, 0 insertions, 0 deletions