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author | Peter Maydell | 2018-09-25 15:02:32 +0200 |
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committer | Peter Maydell | 2018-09-25 16:13:24 +0200 |
commit | b6e6c65151efb72063a9dd62fbd5baa744d4ab30 (patch) | |
tree | 6216c93c977a70dbc3174c579fa50ce990b753c7 /hw/intc/arm_gic_common.c | |
parent | hw/intc/arm_gic: Document QEMU interface (diff) | |
download | qemu-b6e6c65151efb72063a9dd62fbd5baa744d4ab30.tar.gz qemu-b6e6c65151efb72063a9dd62fbd5baa744d4ab30.tar.xz qemu-b6e6c65151efb72063a9dd62fbd5baa744d4ab30.zip |
hw/intc/arm_gic: Drop GIC_BASE_IRQ macro
The GIC_BASE_IRQ macro is a leftover from when we shared code
between the GICv2 and the v7M NVIC. Since the NVIC is now
split off, GIC_BASE_IRQ is always 0, and we can just delete it.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Luc Michel <luc.michel@greensocs.com>
Message-id: 20180824161819.11085-1-peter.maydell@linaro.org
Diffstat (limited to 'hw/intc/arm_gic_common.c')
-rw-r--r-- | hw/intc/arm_gic_common.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/hw/intc/arm_gic_common.c b/hw/intc/arm_gic_common.c index 547dc41185..57569a4e59 100644 --- a/hw/intc/arm_gic_common.c +++ b/hw/intc/arm_gic_common.c @@ -191,7 +191,6 @@ static void arm_gic_common_realize(DeviceState *dev, Error **errp) s->num_cpu, GIC_NCPU); return; } - s->num_irq += GIC_BASE_IRQ; if (s->num_irq > GIC_MAXIRQ) { error_setg(errp, "requested %u interrupt lines exceeds GIC maximum %d", |