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author | Peter Maydell | 2016-06-17 16:23:46 +0200 |
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committer | Peter Maydell | 2016-06-17 16:23:51 +0200 |
commit | 3faf2b0cd5451c452fdaab32f9d2fb870b084f80 (patch) | |
tree | e49d3e1de37327c56c78a7a57a0ea3b08118aca7 /hw/intc/arm_gicv3_common.c | |
parent | hw/intc/arm_gicv3: Add state information (diff) | |
download | qemu-3faf2b0cd5451c452fdaab32f9d2fb870b084f80.tar.gz qemu-3faf2b0cd5451c452fdaab32f9d2fb870b084f80.tar.xz qemu-3faf2b0cd5451c452fdaab32f9d2fb870b084f80.zip |
hw/intc/arm_gicv3: Move irq lines into GICv3CPUState structure
Move the GICv3 parent_irq and parent_fiq pointers into the
GICv3CPUState structure rather than giving them their own array.
This will make it easy to assert the IRQ and FIQ lines for a
particular CPU interface without having to know or calculate
the CPU index for the GICv3CPUState we are working on.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Shannon Zhao <shannon.zhao@linaro.org>
Tested-by: Shannon Zhao <shannon.zhao@linaro.org>
Message-id: 1465915112-29272-8-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'hw/intc/arm_gicv3_common.c')
-rw-r--r-- | hw/intc/arm_gicv3_common.c | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/hw/intc/arm_gicv3_common.c b/hw/intc/arm_gicv3_common.c index bf6949f8cd..1557833173 100644 --- a/hw/intc/arm_gicv3_common.c +++ b/hw/intc/arm_gicv3_common.c @@ -72,14 +72,11 @@ void gicv3_init_irqs_and_mmio(GICv3State *s, qemu_irq_handler handler, i = s->num_irq - GIC_INTERNAL + GIC_INTERNAL * s->num_cpu; qdev_init_gpio_in(DEVICE(s), handler, i); - s->parent_irq = g_malloc(s->num_cpu * sizeof(qemu_irq)); - s->parent_fiq = g_malloc(s->num_cpu * sizeof(qemu_irq)); - for (i = 0; i < s->num_cpu; i++) { - sysbus_init_irq(sbd, &s->parent_irq[i]); + sysbus_init_irq(sbd, &s->cpu[i].parent_irq); } for (i = 0; i < s->num_cpu; i++) { - sysbus_init_irq(sbd, &s->parent_fiq[i]); + sysbus_init_irq(sbd, &s->cpu[i].parent_fiq); } memory_region_init_io(&s->iomem_dist, OBJECT(s), ops, s, |