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| author | Alistair Francis | 2021-03-31 17:00:11 +0200 |
|---|---|---|
| committer | Alistair Francis | 2021-05-11 12:02:06 +0200 |
| commit | d4cad544992225105d88c3d744bce1b08947dd24 (patch) | |
| tree | 64fbfe4e098d81844b0d22bc4b0e7fb71a2211c8 /hw/intc/intc.c | |
| parent | MAINTAINERS: Update the RISC-V CPU Maintainers (diff) | |
| download | qemu-d4cad544992225105d88c3d744bce1b08947dd24.tar.gz qemu-d4cad544992225105d88c3d744bce1b08947dd24.tar.xz qemu-d4cad544992225105d88c3d744bce1b08947dd24.zip | |
hw/opentitan: Update the interrupt layout
Update the OpenTitan interrupt layout to match the latest OpenTitan
bitstreams. This involves changing the Ibex PLIC memory layout and the
UART interrupts.
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Message-id: e92b696f1809c9fa4410da2e9f23c414db5a6960.1617202791.git.alistair.francis@wdc.com
Diffstat (limited to 'hw/intc/intc.c')
0 files changed, 0 insertions, 0 deletions