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| author | Nick Hudson | 2022-02-12 10:44:17 +0100 |
|---|---|---|
| committer | Jason Wang | 2022-02-14 04:50:44 +0100 |
| commit | 870374214e4cc122f086f55732f1b17ec320132e (patch) | |
| tree | 1a42e7f7654337dcc5e1c26f46bb850444f2376e /hw/intc/pnv_xive.c | |
| parent | net/filter: Optimize filter_send to coroutine (diff) | |
| download | qemu-870374214e4cc122f086f55732f1b17ec320132e.tar.gz qemu-870374214e4cc122f086f55732f1b17ec320132e.tar.xz qemu-870374214e4cc122f086f55732f1b17ec320132e.zip | |
hw/net: e1000e: Clear ICR on read when using non MSI-X interrupts
In section 7.4.3 of the 82574 datasheet it states that
"In systems that do not support MSI-X, reading the ICR
register clears it's bits..."
Some OSes rely on this.
Signed-off-by: Nick Hudson <skrll@netbsd.org>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Diffstat (limited to 'hw/intc/pnv_xive.c')
0 files changed, 0 insertions, 0 deletions