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| author | Peter Maydell | 2022-07-18 20:27:25 +0200 |
|---|---|---|
| committer | Peter Maydell | 2022-07-18 20:27:25 +0200 |
| commit | b8bb9bbf4695b89bbdca702a054db0a7a2c8ff2b (patch) | |
| tree | ab23c55d87b7e6c9ccf17692b830ca2548a1fc1b /hw/intc/xive.c | |
| parent | Merge tag 'pull-target-arm-20220718' of https://git.linaro.org/people/pmaydel... (diff) | |
| parent | target/ppc: Check page dir/table base alignment (diff) | |
| download | qemu-b8bb9bbf4695b89bbdca702a054db0a7a2c8ff2b.tar.gz qemu-b8bb9bbf4695b89bbdca702a054db0a7a2c8ff2b.tar.xz qemu-b8bb9bbf4695b89bbdca702a054db0a7a2c8ff2b.zip | |
Merge tag 'pull-ppc-20220718' of https://gitlab.com/danielhb/qemu into staging
ppc patch queue for 2022-07-18:
This is the last ppc patch queue before the soft freeze. It contains new
TCG instructions and changes, a tricky bug fix in kvmppc_find_cpu_dt()
and other enhancements/fixes.
- tcg and target/ppc:
- move instructions to decodetree
- check for bad Radix configs
- ISA 3.00 tlbie[l]
- fix gen_*_exception error codes
- check fortb_env != 0 when printing TBU/TBL/DECR
- fix kvmppc_find_cpu_dt() returning the wrong CPU DT path when there's a
'clock-frequency' property in the root node
- spapr, e500: pass a random seed in /chosen/rng-seed
- all boards: allocate IRQ lines with qdev_init_gpio_in()
# gpg: Signature made Mon 18 Jul 2022 18:19:58 BST
# gpg: using EDDSA key 17EBFF9923D01800AF2838193CD9CA96DE033164
# gpg: Good signature from "Daniel Henrique Barboza <danielhb413@gmail.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 17EB FF99 23D0 1800 AF28 3819 3CD9 CA96 DE03 3164
* tag 'pull-ppc-20220718' of https://gitlab.com/danielhb/qemu: (30 commits)
target/ppc: Check page dir/table base alignment
target/ppc: Improve Radix xlate level validation
ppc: Check partition and process table alignment
target/ppc: check tb_env != 0 before printing TBU/TBL/DECR
target/ppc: Implement slbiag
target/ppc: Move slbsync to decodetree
target/ppc: Move slbfee to decodetree
target/ppc: Move slbmfee to decodetree
target/ppc: Move slbmfev to decodetree
target/ppc: Move slbmte to decodetree
target/ppc: Move slbia to decodetree
target/ppc: Move slbieg to decodetree
target/ppc: Move slbie to decodetree
target/ppc: add macros to check privilege level
target/ppc: receive DisasContext explicitly in GEN_PRIV
target/ppc: Implement ISA 3.00 tlbie[l]
target/ppc: Move tlbie[l] to decode tree
target/ppc: fix exception error code in spr_write_excp_vector
target/ppc: fix PMU Group A register read/write exceptions
target/ppc: fix exception error code in helper_{load, store}_dcr
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/intc/xive.c')
| -rw-r--r-- | hw/intc/xive.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/hw/intc/xive.c b/hw/intc/xive.c index ae221fed73..a986b96843 100644 --- a/hw/intc/xive.c +++ b/hw/intc/xive.c @@ -695,8 +695,8 @@ static void xive_tctx_realize(DeviceState *dev, Error **errp) env = &cpu->env; switch (PPC_INPUT(env)) { case PPC_FLAGS_INPUT_POWER9: - tctx->hv_output = env->irq_inputs[POWER9_INPUT_HINT]; - tctx->os_output = env->irq_inputs[POWER9_INPUT_INT]; + tctx->hv_output = qdev_get_gpio_in(DEVICE(cpu), POWER9_INPUT_HINT); + tctx->os_output = qdev_get_gpio_in(DEVICE(cpu), POWER9_INPUT_INT); break; default: |