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authorIgor Mammedov2022-06-08 15:53:25 +0200
committerMichael S. Tsirkin2022-06-10 01:32:49 +0200
commit887e8e9d3a4578059bd0a213e9b3cae81943dc18 (patch)
treee17f91cb25cc922a0301cb1fa369d45c705f3628 /hw/isa
parentacpi: pc: isa bridge: use AcpiDevAmlIf interface to build ISA device descriptors (diff)
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acpi: q35: isa bridge: use AcpiDevAmlIf interface to build ISA device descriptors
replaces adhoc build_isa_devices_aml() with generic AcpiDevAmlIf way to build bridge AML including all devices that are attached to its ISA bus. Later when PCI is converted to AcpiDevAmlIf, build_q35_isa_bridge() will also be dropped since PCI parts itself will take care of building device prologue/epilogue AML for each enumerated PCI device. Expected AML change is contextual, where ISA devices are moved from separately declared _SB.PCI0.ISA scope, directly under Device(ISA) node. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Message-Id: <20220608135340.3304695-21-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/isa')
-rw-r--r--hw/isa/lpc_ich9.c19
1 files changed, 19 insertions, 0 deletions
diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c
index 5f143dca17..4553b5925b 100644
--- a/hw/isa/lpc_ich9.c
+++ b/hw/isa/lpc_ich9.c
@@ -50,6 +50,7 @@
#include "hw/core/cpu.h"
#include "hw/nvram/fw_cfg.h"
#include "qemu/cutils.h"
+#include "hw/acpi/acpi_aml_interface.h"
/*****************************************************************************/
/* ICH9 LPC PCI to ISA bridge */
@@ -803,12 +804,28 @@ static void ich9_send_gpe(AcpiDeviceIf *adev, AcpiEventStatusBits ev)
acpi_send_gpe_event(&s->pm.acpi_regs, s->pm.irq, ev);
}
+static void build_ich9_isa_aml(AcpiDevAmlIf *adev, Aml *scope)
+{
+ BusChild *kid;
+ ICH9LPCState *s = ICH9_LPC_DEVICE(adev);
+ BusState *bus = BUS(s->isa_bus);
+
+ /* ICH9 PCI to ISA irq remapping */
+ aml_append(scope, aml_operation_region("PIRQ", AML_PCI_CONFIG,
+ aml_int(0x60), 0x0C));
+
+ QTAILQ_FOREACH(kid, &bus->children, sibling) {
+ call_dev_aml_func(DEVICE(kid->child), scope);
+ }
+}
+
static void ich9_lpc_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(klass);
AcpiDeviceIfClass *adevc = ACPI_DEVICE_IF_CLASS(klass);
+ AcpiDevAmlIfClass *amldevc = ACPI_DEV_AML_IF_CLASS(klass);
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
dc->reset = ich9_lpc_reset;
@@ -833,6 +850,7 @@ static void ich9_lpc_class_init(ObjectClass *klass, void *data)
adevc->ospm_status = ich9_pm_ospm_status;
adevc->send_event = ich9_send_gpe;
adevc->madt_cpu = pc_madt_cpu_entry;
+ amldevc->build_dev_aml = build_ich9_isa_aml;
}
static const TypeInfo ich9_lpc_info = {
@@ -845,6 +863,7 @@ static const TypeInfo ich9_lpc_info = {
{ TYPE_HOTPLUG_HANDLER },
{ TYPE_ACPI_DEVICE_IF },
{ INTERFACE_CONVENTIONAL_PCI_DEVICE },
+ { TYPE_ACPI_DEV_AML_IF },
{ }
}
};