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| author | Sebastian Herbszt | 2009-06-13 23:03:29 +0200 |
|---|---|---|
| committer | Anthony Liguori | 2009-06-16 22:18:39 +0200 |
| commit | 49c47daa3221aaf3765e9fb77cb98e62a55b7bf8 (patch) | |
| tree | 24467cbc8a05762f2e654c75d9159e02b97cd552 /hw/lsi53c895a.c | |
| parent | lsi53c895a: Implement read and write access to DMA Next Address (diff) | |
| download | qemu-49c47daa3221aaf3765e9fb77cb98e62a55b7bf8.tar.gz qemu-49c47daa3221aaf3765e9fb77cb98e62a55b7bf8.tar.xz qemu-49c47daa3221aaf3765e9fb77cb98e62a55b7bf8.zip | |
lsi53c895a: Implement write access to DMA Byte Counter
Adds CASE_SET_REG24 and fixes the following errors:
lsi_scsi: error: Unhandled writeb 0x24 = 0x0
lsi_scsi: error: Unhandled writeb 0x25 = 0x0
Signed-off-by: Sebastian Herbszt <herbszt@gmx.de>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'hw/lsi53c895a.c')
| -rw-r--r-- | hw/lsi53c895a.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/hw/lsi53c895a.c b/hw/lsi53c895a.c index 3c23ddc1ed..71f8281165 100644 --- a/hw/lsi53c895a.c +++ b/hw/lsi53c895a.c @@ -1492,6 +1492,11 @@ static uint8_t lsi_reg_readb(LSIState *s, int offset) static void lsi_reg_writeb(LSIState *s, int offset, uint8_t val) { +#define CASE_SET_REG24(name, addr) \ + case addr : s->name &= 0xffffff00; s->name |= val; break; \ + case addr + 1: s->name &= 0xffff00ff; s->name |= val << 8; break; \ + case addr + 2: s->name &= 0xff00ffff; s->name |= val << 16; break; + #define CASE_SET_REG32(name, addr) \ case addr : s->name &= 0xffffff00; s->name |= val; break; \ case addr + 1: s->name &= 0xffff00ff; s->name |= val << 8; break; \ @@ -1596,6 +1601,7 @@ static void lsi_reg_writeb(LSIState *s, int offset, uint8_t val) } s->ctest5 = val; break; + CASE_SET_REG24(dbc, 0x24) CASE_SET_REG32(dnad, 0x28) case 0x2c: /* DSP[0:7] */ s->dsp &= 0xffffff00; @@ -1710,6 +1716,7 @@ static void lsi_reg_writeb(LSIState *s, int offset, uint8_t val) BADF("Unhandled writeb 0x%x = 0x%x\n", offset, val); } } +#undef CASE_SET_REG24 #undef CASE_SET_REG32 } |