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| author | Avi Kivity | 2012-10-23 12:30:10 +0200 |
|---|---|---|
| committer | Anthony Liguori | 2012-10-23 15:58:25 +0200 |
| commit | a8170e5e97ad17ca169c64ba87ae2f53850dab4c (patch) | |
| tree | 51182ed444f0d2bf282f6bdacef43f32e5adaadf /hw/m48t59.c | |
| parent | Merge remote-tracking branch 'qemu-kvm/memory/urgent' into staging (diff) | |
| download | qemu-a8170e5e97ad17ca169c64ba87ae2f53850dab4c.tar.gz qemu-a8170e5e97ad17ca169c64ba87ae2f53850dab4c.tar.xz qemu-a8170e5e97ad17ca169c64ba87ae2f53850dab4c.zip | |
Rename target_phys_addr_t to hwaddr
target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are
reserved) and its purpose doesn't match the name (most target_phys_addr_t
addresses are not target specific). Replace it with a finger-friendly,
standards conformant hwaddr.
Outstanding patchsets can be fixed up with the command
git rebase -i --exec 'find -name "*.[ch]"
| xargs s/target_phys_addr_t/hwaddr/g' origin
Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'hw/m48t59.c')
| -rw-r--r-- | hw/m48t59.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/hw/m48t59.c b/hw/m48t59.c index dd6cb37ba6..9eb1a0968a 100644 --- a/hw/m48t59.c +++ b/hw/m48t59.c @@ -522,14 +522,14 @@ static uint32_t NVRAM_readb (void *opaque, uint32_t addr) return retval; } -static void nvram_writeb (void *opaque, target_phys_addr_t addr, uint32_t value) +static void nvram_writeb (void *opaque, hwaddr addr, uint32_t value) { M48t59State *NVRAM = opaque; m48t59_write(NVRAM, addr, value & 0xff); } -static void nvram_writew (void *opaque, target_phys_addr_t addr, uint32_t value) +static void nvram_writew (void *opaque, hwaddr addr, uint32_t value) { M48t59State *NVRAM = opaque; @@ -537,7 +537,7 @@ static void nvram_writew (void *opaque, target_phys_addr_t addr, uint32_t value) m48t59_write(NVRAM, addr + 1, value & 0xff); } -static void nvram_writel (void *opaque, target_phys_addr_t addr, uint32_t value) +static void nvram_writel (void *opaque, hwaddr addr, uint32_t value) { M48t59State *NVRAM = opaque; @@ -547,7 +547,7 @@ static void nvram_writel (void *opaque, target_phys_addr_t addr, uint32_t value) m48t59_write(NVRAM, addr + 3, value & 0xff); } -static uint32_t nvram_readb (void *opaque, target_phys_addr_t addr) +static uint32_t nvram_readb (void *opaque, hwaddr addr) { M48t59State *NVRAM = opaque; uint32_t retval; @@ -556,7 +556,7 @@ static uint32_t nvram_readb (void *opaque, target_phys_addr_t addr) return retval; } -static uint32_t nvram_readw (void *opaque, target_phys_addr_t addr) +static uint32_t nvram_readw (void *opaque, hwaddr addr) { M48t59State *NVRAM = opaque; uint32_t retval; @@ -566,7 +566,7 @@ static uint32_t nvram_readw (void *opaque, target_phys_addr_t addr) return retval; } -static uint32_t nvram_readl (void *opaque, target_phys_addr_t addr) +static uint32_t nvram_readl (void *opaque, hwaddr addr) { M48t59State *NVRAM = opaque; uint32_t retval; @@ -636,7 +636,7 @@ static const MemoryRegionOps m48t59_io_ops = { }; /* Initialisation routine */ -M48t59State *m48t59_init(qemu_irq IRQ, target_phys_addr_t mem_base, +M48t59State *m48t59_init(qemu_irq IRQ, hwaddr mem_base, uint32_t io_base, uint16_t size, int model) { DeviceState *dev; |