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author | Peter Maydell | 2019-10-21 16:06:00 +0200 |
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committer | Peter Maydell | 2019-10-25 14:09:27 +0200 |
commit | efe62d6fa0dd67573c0cb7f06e87c03801a085d5 (patch) | |
tree | 604ff1cab14a51010f311141a6a130f73df7573d /hw/m68k | |
parent | hw/timer/grlib_gptimer.c: Switch to transaction-based ptimer API (diff) | |
download | qemu-efe62d6fa0dd67573c0cb7f06e87c03801a085d5.tar.gz qemu-efe62d6fa0dd67573c0cb7f06e87c03801a085d5.tar.xz qemu-efe62d6fa0dd67573c0cb7f06e87c03801a085d5.zip |
hw/m68k/mcf5206.c: Switch to transaction-based ptimer API
Switch the mcf5206 code away from bottom-half based ptimers to
the new transaction-based ptimer API. This just requires adding
begin/commit calls around the various places that modify the ptimer
state, and using the new ptimer_init() function to create the timer.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-id: 20191021140600.10725-1-peter.maydell@linaro.org
Diffstat (limited to 'hw/m68k')
-rw-r--r-- | hw/m68k/mcf5206.c | 15 |
1 files changed, 9 insertions, 6 deletions
diff --git a/hw/m68k/mcf5206.c b/hw/m68k/mcf5206.c index a49096367c..b155dd8170 100644 --- a/hw/m68k/mcf5206.c +++ b/hw/m68k/mcf5206.c @@ -8,7 +8,6 @@ #include "qemu/osdep.h" #include "qemu/error-report.h" -#include "qemu/main-loop.h" #include "cpu.h" #include "hw/hw.h" #include "hw/irq.h" @@ -57,10 +56,12 @@ static void m5206_timer_recalibrate(m5206_timer_state *s) int prescale; int mode; + ptimer_transaction_begin(s->timer); ptimer_stop(s->timer); - if ((s->tmr & TMR_RST) == 0) - return; + if ((s->tmr & TMR_RST) == 0) { + goto exit; + } prescale = (s->tmr >> 8) + 1; mode = (s->tmr >> 1) & 3; @@ -78,6 +79,8 @@ static void m5206_timer_recalibrate(m5206_timer_state *s) ptimer_set_limit(s->timer, s->trr, 0); ptimer_run(s->timer, 0); +exit: + ptimer_transaction_commit(s->timer); } static void m5206_timer_trigger(void *opaque) @@ -123,7 +126,9 @@ static void m5206_timer_write(m5206_timer_state *s, uint32_t addr, uint32_t val) s->tcr = val; break; case 0xc: + ptimer_transaction_begin(s->timer); ptimer_set_count(s->timer, val); + ptimer_transaction_commit(s->timer); break; case 0x11: s->ter &= ~val; @@ -137,11 +142,9 @@ static void m5206_timer_write(m5206_timer_state *s, uint32_t addr, uint32_t val) static m5206_timer_state *m5206_timer_init(qemu_irq irq) { m5206_timer_state *s; - QEMUBH *bh; s = g_new0(m5206_timer_state, 1); - bh = qemu_bh_new(m5206_timer_trigger, s); - s->timer = ptimer_init_with_bh(bh, PTIMER_POLICY_DEFAULT); + s->timer = ptimer_init(m5206_timer_trigger, s, PTIMER_POLICY_DEFAULT); s->irq = irq; m5206_timer_reset(s); return s; |