diff options
author | Ben Widawsky | 2022-04-29 16:40:45 +0200 |
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committer | Michael S. Tsirkin | 2022-05-13 12:13:36 +0200 |
commit | 639daf8e93bcf266d0518eecbcfe12d26644a0a9 (patch) | |
tree | 7c175f7dfffee622b0172c7208ee39230937bb55 /hw/mem | |
parent | hw/cxl/device: Add some trivial commands (diff) | |
download | qemu-639daf8e93bcf266d0518eecbcfe12d26644a0a9.tar.gz qemu-639daf8e93bcf266d0518eecbcfe12d26644a0a9.tar.xz qemu-639daf8e93bcf266d0518eecbcfe12d26644a0a9.zip |
hw/cxl/device: Plumb real Label Storage Area (LSA) sizing
This should introduce no change. Subsequent work will make use of this
new class member.
Signed-off-by: Ben Widawsky <ben.widawsky@intel.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20220429144110.25167-21-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/mem')
-rw-r--r-- | hw/mem/cxl_type3.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c index 318b6f9fbc..b5aa1067df 100644 --- a/hw/mem/cxl_type3.c +++ b/hw/mem/cxl_type3.c @@ -179,10 +179,16 @@ static Property ct3_props[] = { DEFINE_PROP_END_OF_LIST(), }; +static uint64_t get_lsa_size(CXLType3Dev *ct3d) +{ + return 0; +} + static void ct3_class_init(ObjectClass *oc, void *data) { DeviceClass *dc = DEVICE_CLASS(oc); PCIDeviceClass *pc = PCI_DEVICE_CLASS(oc); + CXLType3Class *cvc = CXL_TYPE3_CLASS(oc); pc->realize = ct3_realize; pc->exit = ct3_exit; @@ -195,11 +201,14 @@ static void ct3_class_init(ObjectClass *oc, void *data) dc->desc = "CXL PMEM Device (Type 3)"; dc->reset = ct3d_reset; device_class_set_props(dc, ct3_props); + + cvc->get_lsa_size = get_lsa_size; } static const TypeInfo ct3d_info = { .name = TYPE_CXL_TYPE3, .parent = TYPE_PCI_DEVICE, + .class_size = sizeof(struct CXLType3Class), .class_init = ct3_class_init, .instance_size = sizeof(CXLType3Dev), .interfaces = (InterfaceInfo[]) { |