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author | Alistair Francis | 2018-01-22 20:43:48 +0100 |
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committer | Edgar E. Iglesias | 2018-01-26 11:09:09 +0100 |
commit | 07b30201e691dcaf1646df9d02ccbe27a8ea0ef3 (patch) | |
tree | cc027c9c41b921831e4473b075dd7c414d957b5e /hw/microblaze | |
parent | xlnx-zynqmp-ipi: Initial version of the Xilinx IPI device (diff) | |
download | qemu-07b30201e691dcaf1646df9d02ccbe27a8ea0ef3.tar.gz qemu-07b30201e691dcaf1646df9d02ccbe27a8ea0ef3.tar.xz qemu-07b30201e691dcaf1646df9d02ccbe27a8ea0ef3.zip |
xlnx-zynqmp-pmu: Connect the IPI device to the PMU
Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Diffstat (limited to 'hw/microblaze')
-rw-r--r-- | hw/microblaze/xlnx-zynqmp-pmu.c | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/hw/microblaze/xlnx-zynqmp-pmu.c b/hw/microblaze/xlnx-zynqmp-pmu.c index 7312bfe23e..999a5657cf 100644 --- a/hw/microblaze/xlnx-zynqmp-pmu.c +++ b/hw/microblaze/xlnx-zynqmp-pmu.c @@ -24,6 +24,7 @@ #include "cpu.h" #include "boot.h" +#include "hw/intc/xlnx-zynqmp-ipi.h" #include "hw/intc/xlnx-pmu-iomod-intc.h" /* Define the PMU device */ @@ -38,6 +39,15 @@ #define XLNX_ZYNQMP_PMU_INTC_ADDR 0xFFD40000 +#define XLNX_ZYNQMP_PMU_NUM_IPIS 4 + +static const uint64_t ipi_addr[XLNX_ZYNQMP_PMU_NUM_IPIS] = { + 0xFF340000, 0xFF350000, 0xFF360000, 0xFF370000, +}; +static const uint64_t ipi_irq[XLNX_ZYNQMP_PMU_NUM_IPIS] = { + 19, 20, 21, 22, +}; + typedef struct XlnxZynqMPPMUSoCState { /*< private >*/ DeviceState parent_obj; @@ -136,6 +146,9 @@ static void xlnx_zynqmp_pmu_init(MachineState *machine) MemoryRegion *address_space_mem = get_system_memory(); MemoryRegion *pmu_rom = g_new(MemoryRegion, 1); MemoryRegion *pmu_ram = g_new(MemoryRegion, 1); + XlnxZynqMPIPI *ipi[XLNX_ZYNQMP_PMU_NUM_IPIS]; + qemu_irq irq[32]; + int i; /* Create the ROM */ memory_region_init_rom(pmu_rom, NULL, "xlnx-zynqmp-pmu.rom", @@ -155,6 +168,24 @@ static void xlnx_zynqmp_pmu_init(MachineState *machine) &error_abort); object_property_set_bool(OBJECT(pmu), true, "realized", &error_fatal); + for (i = 0; i < 32; i++) { + irq[i] = qdev_get_gpio_in(DEVICE(&pmu->intc), i); + } + + /* Create and connect the IPI device */ + for (i = 0; i < XLNX_ZYNQMP_PMU_NUM_IPIS; i++) { + ipi[i] = g_new0(XlnxZynqMPIPI, 1); + object_initialize(ipi[i], sizeof(XlnxZynqMPIPI), TYPE_XLNX_ZYNQMP_IPI); + qdev_set_parent_bus(DEVICE(ipi[i]), sysbus_get_default()); + } + + for (i = 0; i < XLNX_ZYNQMP_PMU_NUM_IPIS; i++) { + object_property_set_bool(OBJECT(ipi[i]), true, "realized", + &error_abort); + sysbus_mmio_map(SYS_BUS_DEVICE(ipi[i]), 0, ipi_addr[i]); + sysbus_connect_irq(SYS_BUS_DEVICE(ipi[i]), 0, irq[ipi_irq[i]]); + } + /* Load the kernel */ microblaze_load_kernel(&pmu->cpu, XLNX_ZYNQMP_PMU_RAM_ADDR, machine->ram_size, |