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author | Thiago Jung Bauermann | 2020-08-26 07:55:32 +0200 |
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committer | David Gibson | 2020-09-08 02:08:43 +0200 |
commit | 102ca9667d1e813c305ff84e6d07408258717ba9 (patch) | |
tree | 50432495aa49887493dcdefc9b300b7f427560ec /hw/mips/cps.c | |
parent | ppc/e500: Use start-powered-off CPUState property (diff) | |
download | qemu-102ca9667d1e813c305ff84e6d07408258717ba9.tar.gz qemu-102ca9667d1e813c305ff84e6d07408258717ba9.tar.xz qemu-102ca9667d1e813c305ff84e6d07408258717ba9.zip |
mips/cps: Use start-powered-off CPUState property
Instead of setting CPUState::halted to 1 in main_cpu_reset(), use the
start-powered-off property which makes cpu_common_reset() initialize it
to 1 in common code.
Also change creation of CPU object from cpu_create() to object_new() and
qdev_realize_and_unref() because cpu_create() realizes the CPU and it's not
possible to set a property after the object is realized.
Signed-off-by: Thiago Jung Bauermann <bauerman@linux.ibm.com>
Message-Id: <20200826055535.951207-6-bauerman@linux.ibm.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'hw/mips/cps.c')
-rw-r--r-- | hw/mips/cps.c | 15 |
1 files changed, 11 insertions, 4 deletions
diff --git a/hw/mips/cps.c b/hw/mips/cps.c index 615e1a1ad2..23c0f87e41 100644 --- a/hw/mips/cps.c +++ b/hw/mips/cps.c @@ -52,9 +52,6 @@ static void main_cpu_reset(void *opaque) CPUState *cs = CPU(cpu); cpu_reset(cs); - - /* All VPs are halted on reset. Leave powering up to CPC. */ - cs->halted = 1; } static bool cpu_mips_itu_supported(CPUMIPSState *env) @@ -76,7 +73,17 @@ static void mips_cps_realize(DeviceState *dev, Error **errp) bool saar_present = false; for (i = 0; i < s->num_vp; i++) { - cpu = MIPS_CPU(cpu_create(s->cpu_type)); + cpu = MIPS_CPU(object_new(s->cpu_type)); + + /* All VPs are halted on reset. Leave powering up to CPC. */ + if (!object_property_set_bool(OBJECT(cpu), "start-powered-off", true, + errp)) { + return; + } + + if (!qdev_realize_and_unref(DEVICE(cpu), NULL, errp)) { + return; + } /* Init internal devices */ cpu_mips_irq_init_cpu(cpu); |