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authorMarkus Armbruster2020-06-30 11:03:43 +0200
committerMarkus Armbruster2020-07-02 06:25:29 +0200
commit3e9a88c3721cd0171ab4e51f0b3617befd124e2a (patch)
tree42b1ad4ebfb6982292fd265088f84dcfb925910f /hw/mips/cps.c
parentriscv/sifive_u: Fix sifive_u_soc_realize() error API violations (diff)
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riscv_hart: Fix riscv_harts_realize() error API violations
The Error ** argument must be NULL, &error_abort, &error_fatal, or a pointer to a variable containing NULL. Passing an argument of the latter kind twice without clearing it in between is wrong: if the first call sets an error, it no longer points to NULL for the second call. riscv_harts_realize() is wrong that way: it passes @errp to riscv_hart_realize() in a loop. I can't tell offhand whether this can fail. Fix by checking for failure in each iteration. Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Alistair Francis <Alistair.Francis@wdc.com> Cc: Sagar Karandikar <sagark@eecs.berkeley.edu> Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: qemu-riscv@nongnu.org Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20200630090351.1247703-19-armbru@redhat.com>
Diffstat (limited to 'hw/mips/cps.c')
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