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author | Peter Maydell | 2017-10-30 11:11:22 +0100 |
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committer | Peter Maydell | 2017-10-30 11:11:22 +0100 |
commit | ab752f237d755897735dc755182f60af39cbc5b6 (patch) | |
tree | c7c3ad0f9daf8405cf475730801421b5643e75f5 /hw/mips/mips_malta.c | |
parent | Merge remote-tracking branch 'remotes/mdroth/tags/qga-pull-2017-10-26-tag' in... (diff) | |
parent | x86: Skip check apic_id_limit for Xen (diff) | |
download | qemu-ab752f237d755897735dc755182f60af39cbc5b6.tar.gz qemu-ab752f237d755897735dc755182f60af39cbc5b6.tar.xz qemu-ab752f237d755897735dc755182f60af39cbc5b6.zip |
Merge remote-tracking branch 'remotes/ehabkost/tags/x86-and-machine-pull-request' into staging
x86/cpu/numa queue, 2017-10-27
# gpg: Signature made Fri 27 Oct 2017 15:17:12 BST
# gpg: using RSA key 0x2807936F984DC5A6
# gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>"
# Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6
* remotes/ehabkost/tags/x86-and-machine-pull-request: (39 commits)
x86: Skip check apic_id_limit for Xen
numa: fixup parsed NumaNodeOptions earlier
mips: r4k: replace cpu_model with cpu_type
mips: mipssim: replace cpu_model with cpu_type
mips: Magnum/Acer Pica 61: replace cpu_model with cpu_type
mips: fulong2e: replace cpu_model with cpu_type
mips: malta/boston: replace cpu_model with cpu_type
mips: use object_new() instead of gnew()+object_initialize()
sparc: leon3: use generic cpu_model parsing
sparc: sparc: use generic cpu_model parsing
sparc: sun4u/sun4v/niagara: use generic cpu_model parsing
sparc: cleanup cpu type name composition
tricore: use generic cpu_model parsing
tricore: cleanup cpu type name composition
unicore32: use generic cpu_model parsing
unicore32: cleanup cpu type name composition
xtensa: lx60/lx200/ml605/kc705: use generic cpu_model parsing
xtensa: sim: use generic cpu_model parsing
xtensa: cleanup cpu type name composition
sh4: remove SuperHCPUClass::name field
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/mips/mips_malta.c')
-rw-r--r-- | hw/mips/mips_malta.c | 36 |
1 files changed, 16 insertions, 20 deletions
diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c index 2adb9bcf89..ec6af4a277 100644 --- a/hw/mips/mips_malta.c +++ b/hw/mips/mips_malta.c @@ -923,7 +923,7 @@ static void main_cpu_reset(void *opaque) } } -static void create_cpu_without_cps(const char *cpu_model, +static void create_cpu_without_cps(const char *cpu_type, qemu_irq *cbus_irq, qemu_irq *i8259_irq) { CPUMIPSState *env; @@ -931,7 +931,7 @@ static void create_cpu_without_cps(const char *cpu_model, int i; for (i = 0; i < smp_cpus; i++) { - cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model)); + cpu = MIPS_CPU(cpu_create(cpu_type)); /* Init internal devices */ cpu_mips_irq_init_cpu(cpu); @@ -945,16 +945,15 @@ static void create_cpu_without_cps(const char *cpu_model, *cbus_irq = env->irq[4]; } -static void create_cps(MaltaState *s, const char *cpu_model, +static void create_cps(MaltaState *s, const char *cpu_type, qemu_irq *cbus_irq, qemu_irq *i8259_irq) { Error *err = NULL; - s->cps = g_new0(MIPSCPSState, 1); - object_initialize(s->cps, sizeof(MIPSCPSState), TYPE_MIPS_CPS); + s->cps = MIPS_CPS(object_new(TYPE_MIPS_CPS)); qdev_set_parent_bus(DEVICE(s->cps), sysbus_get_default()); - object_property_set_str(OBJECT(s->cps), cpu_model, "cpu-model", &err); + object_property_set_str(OBJECT(s->cps), cpu_type, "cpu-type", &err); object_property_set_int(OBJECT(s->cps), smp_cpus, "num-vp", &err); object_property_set_bool(OBJECT(s->cps), true, "realized", &err); if (err != NULL) { @@ -968,21 +967,13 @@ static void create_cps(MaltaState *s, const char *cpu_model, *cbus_irq = NULL; } -static void create_cpu(MaltaState *s, const char *cpu_model, - qemu_irq *cbus_irq, qemu_irq *i8259_irq) +static void mips_create_cpu(MaltaState *s, const char *cpu_type, + qemu_irq *cbus_irq, qemu_irq *i8259_irq) { - if (cpu_model == NULL) { -#ifdef TARGET_MIPS64 - cpu_model = "20Kc"; -#else - cpu_model = "24Kf"; -#endif - } - - if ((smp_cpus > 1) && cpu_supports_cps_smp(cpu_model)) { - create_cps(s, cpu_model, cbus_irq, i8259_irq); + if ((smp_cpus > 1) && cpu_supports_cps_smp(cpu_type)) { + create_cps(s, cpu_type, cbus_irq, i8259_irq); } else { - create_cpu_without_cps(cpu_model, cbus_irq, i8259_irq); + create_cpu_without_cps(cpu_type, cbus_irq, i8259_irq); } } @@ -1039,7 +1030,7 @@ void mips_malta_init(MachineState *machine) } /* create CPU */ - create_cpu(s, machine->cpu_model, &cbus_irq, &i8259_irq); + mips_create_cpu(s, machine->cpu_type, &cbus_irq, &i8259_irq); /* allocate RAM */ if (ram_size > (2048u << 20)) { @@ -1265,6 +1256,11 @@ static void mips_malta_machine_init(MachineClass *mc) mc->block_default_type = IF_IDE; mc->max_cpus = 16; mc->is_default = 1; +#ifdef TARGET_MIPS64 + mc->default_cpu_type = MIPS_CPU_TYPE_NAME("20Kc"); +#else + mc->default_cpu_type = MIPS_CPU_TYPE_NAME("24Kf"); +#endif } DEFINE_MACHINE("malta", mips_malta_machine_init) |