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| author | Bernhard Beschow | 2022-06-03 20:50:40 +0200 |
|---|---|---|
| committer | Philippe Mathieu-Daudé | 2022-06-11 11:44:50 +0200 |
| commit | 19e375db22461b255d32704ad289508e0f1d9947 (patch) | |
| tree | 5c0f04868a92691c8111b2376e94d628a2d850a1 /hw/mips | |
| parent | hw/isa/piix4: Factor out ISABus retrieval from piix4_create() (diff) | |
| download | qemu-19e375db22461b255d32704ad289508e0f1d9947.tar.gz qemu-19e375db22461b255d32704ad289508e0f1d9947.tar.xz qemu-19e375db22461b255d32704ad289508e0f1d9947.zip | |
hw/isa/piix4: QOM'ify PIIX4 PM creation
Just like the real hardware, create the PIIX4 ACPI controller as part of
the PIIX4 southbridge. This also mirrors how the IDE and USB functions
are already created.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20220603185045.143789-7-shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Diffstat (limited to 'hw/mips')
| -rw-r--r-- | hw/mips/malta.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/hw/mips/malta.c b/hw/mips/malta.c index e446b25ad0..be9f26d841 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -1238,6 +1238,7 @@ void mips_malta_init(MachineState *machine) int be; MaltaState *s; DeviceState *dev; + DeviceState *pm_dev; s = MIPS_MALTA(qdev_new(TYPE_MIPS_MALTA)); sysbus_realize_and_unref(SYS_BUS_DEVICE(s), &error_fatal); @@ -1399,8 +1400,10 @@ void mips_malta_init(MachineState *machine) empty_slot_init("GT64120", 0, 0x20000000); /* Southbridge */ - dev = piix4_create(pci_bus, &smbus); + dev = piix4_create(pci_bus); isa_bus = ISA_BUS(qdev_get_child_bus(dev, "isa.0")); + pm_dev = DEVICE(object_resolve_path_component(OBJECT(dev), "pm")); + smbus = I2C_BUS(qdev_get_child_bus(pm_dev, "i2c")); /* Interrupt controller */ qdev_connect_gpio_out_named(dev, "intr", 0, i8259_irq); |