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authorPaolo Bonzini2013-07-22 15:54:20 +0200
committerAnthony Liguori2013-07-25 15:12:27 +0200
commitbdb75c79878c7a23a7891124d50483329dd8924d (patch)
tree808572cd1bb64863d89e986b092cd98c259450c4 /hw/mips
parentppc440_bamboo: do not use isa_mmio (diff)
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mipssim: do not use isa_mmio
Untested, this board does not support PCI so it cannot run endianness-test. It should fix endianness bugs in I/O port access. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-11-git-send-email-pbonzini@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'hw/mips')
-rw-r--r--hw/mips/mips_mipssim.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/hw/mips/mips_mipssim.c b/hw/mips/mips_mipssim.c
index a10cf13a92..e4a11c8a05 100644
--- a/hw/mips/mips_mipssim.c
+++ b/hw/mips/mips_mipssim.c
@@ -140,6 +140,7 @@ mips_mipssim_init(QEMUMachineInitArgs *args)
const char *initrd_filename = args->initrd_filename;
char *filename;
MemoryRegion *address_space_mem = get_system_memory();
+ MemoryRegion *isa = g_new(MemoryRegion, 1);
MemoryRegion *ram = g_new(MemoryRegion, 1);
MemoryRegion *bios = g_new(MemoryRegion, 1);
MIPSCPU *cpu;
@@ -212,7 +213,9 @@ mips_mipssim_init(QEMUMachineInitArgs *args)
cpu_mips_clock_init(env);
/* Register 64 KB of ISA IO space at 0x1fd00000. */
- isa_mmio_init(0x1fd00000, 0x00010000);
+ memory_region_init_alias(isa, NULL, "isa_mmio",
+ get_system_io(), 0, 0x00010000);
+ memory_region_add_subregion(get_system_memory(), 0x1fd00000, isa);
/* A single 16450 sits at offset 0x3f8. It is attached to
MIPS CPU INT2, which is interrupt 4. */