Merge remote-tracking branch 'afaerber/tags/qom-devices-for-anthony' into staging

QOM device refactorings

* Replace all uses of FROM_SYSBUS() macro with QOM cast macros
  i) "QOM cast cleanup for X"
     Indicates a mechanical 1:1 between TYPE_* and *State.
  ii) "QOM'ify X and Y"
      Indicates abstract types may have been inserted or similar changes
      to type hierarchy.
  ii) Renames
      Coding Style fixes such as CamelCase have been applied in some cases.
* Fix for sparc floppy - cf. ii) above
* Change PCI type hierarchy to provide PCI_BRIDGE() casts
* In doing so, prepare for adopting QOM realize

# gpg: Signature made Mon 29 Jul 2013 02:15:22 PM CDT using RSA key ID 3E7E013F
# gpg: Can't check signature: public key not found

# By Andreas Färber (171) and others
# Via Andreas Färber
* afaerber/tags/qom-devices-for-anthony: (173 commits)
  sysbus: QOM parent field cleanup for SysBusDevice
  spapr_pci: QOM cast cleanup
  ioapic: QOM cast cleanup
  kvm/ioapic: QOM cast cleanup
  kvmvapic: QOM cast cleanup
  mipsnet: QOM cast cleanup
  opencores_eth: QOM cast cleanup
  exynos4210_i2c: QOM cast cleanup
  sysbus: Remove unused sysbus_new() prototype
  sysbus: Drop FROM_SYSBUS()
  xilinx_timer: QOM cast cleanup
  tusb6010: QOM cast cleanup
  slavio_timer: QOM cast cleanup
  pxa2xx_timer: QOM'ify pxa25x-timer and pxa27x-timer
  puv3_ost: QOM cast cleanup
  pl031: QOM cast cleanup
  pl031: Rename pl031_state to PL031State
  milkymist-sysctl: QOM cast cleanup
  m48t59: QOM cast cleanup for M48t59SysBusState
  lm32_timer: QOM cast cleanup
  ...

1 files changed, 20 insertions, 16 deletions

diff --git a/hw/misc/arm_l2x0.c b/hw/misc/arm_l2x0.c
index 3d6acee695..8e192cdf83 100644
--- a/hw/misc/arm_l2x0.c
+++ b/hw/misc/arm_l2x0.c
@@ -23,8 +23,12 @@
 /* L2C-310 r3p2 */
 #define CACHE_ID 0x410000c8
 
-typedef struct l2x0_state {
-    SysBusDevice busdev;
+#define TYPE_ARM_L2X0 "l2x0"
+#define ARM_L2X0(obj) OBJECT_CHECK(L2x0State, (obj), TYPE_ARM_L2X0)
+
+typedef struct L2x0State {
+    SysBusDevice parent_obj;
+
     MemoryRegion iomem;
     uint32_t cache_type;
     uint32_t ctrl;
@@ -33,19 +37,19 @@ typedef struct l2x0_state {
     uint32_t tag_ctrl;
     uint32_t filter_start;
     uint32_t filter_end;
-} l2x0_state;
+} L2x0State;
 
 static const VMStateDescription vmstate_l2x0 = {
     .name = "l2x0",
     .version_id = 1,
     .minimum_version_id = 1,
     .fields = (VMStateField[]) {
-        VMSTATE_UINT32(ctrl, l2x0_state),
-        VMSTATE_UINT32(aux_ctrl, l2x0_state),
-        VMSTATE_UINT32(data_ctrl, l2x0_state),
-        VMSTATE_UINT32(tag_ctrl, l2x0_state),
-        VMSTATE_UINT32(filter_start, l2x0_state),
-        VMSTATE_UINT32(filter_end, l2x0_state),
+        VMSTATE_UINT32(ctrl, L2x0State),
+        VMSTATE_UINT32(aux_ctrl, L2x0State),
+        VMSTATE_UINT32(data_ctrl, L2x0State),
+        VMSTATE_UINT32(tag_ctrl, L2x0State),
+        VMSTATE_UINT32(filter_start, L2x0State),
+        VMSTATE_UINT32(filter_end, L2x0State),
         VMSTATE_END_OF_LIST()
     }
 };
@@ -55,7 +59,7 @@ static uint64_t l2x0_priv_read(void *opaque, hwaddr offset,
                                unsigned size)
 {
     uint32_t cache_data;
-    l2x0_state *s = (l2x0_state *)opaque;
+    L2x0State *s = (L2x0State *)opaque;
     offset &= 0xfff;
     if (offset >= 0x730 && offset < 0x800) {
         return 0; /* cache ops complete */
@@ -97,7 +101,7 @@ static uint64_t l2x0_priv_read(void *opaque, hwaddr offset,
 static void l2x0_priv_write(void *opaque, hwaddr offset,
                             uint64_t value, unsigned size)
 {
-    l2x0_state *s = (l2x0_state *)opaque;
+    L2x0State *s = (L2x0State *)opaque;
     offset &= 0xfff;
     if (offset >= 0x730 && offset < 0x800) {
         /* ignore */
@@ -137,7 +141,7 @@ static void l2x0_priv_write(void *opaque, hwaddr offset,
 
 static void l2x0_priv_reset(DeviceState *dev)
 {
-    l2x0_state *s = DO_UPCAST(l2x0_state, busdev.qdev, dev);
+    L2x0State *s = ARM_L2X0(dev);
 
     s->ctrl = 0;
     s->aux_ctrl = 0x02020000;
@@ -155,7 +159,7 @@ static const MemoryRegionOps l2x0_mem_ops = {
 
 static int l2x0_priv_init(SysBusDevice *dev)
 {
-    l2x0_state *s = FROM_SYSBUS(l2x0_state, dev);
+    L2x0State *s = ARM_L2X0(dev);
 
     memory_region_init_io(&s->iomem, OBJECT(dev), &l2x0_mem_ops, s,
                           "l2x0_cc", 0x1000);
@@ -164,7 +168,7 @@ static int l2x0_priv_init(SysBusDevice *dev)
 }
 
 static Property l2x0_properties[] = {
-    DEFINE_PROP_UINT32("cache-type", l2x0_state, cache_type, 0x1c100100),
+    DEFINE_PROP_UINT32("cache-type", L2x0State, cache_type, 0x1c100100),
     DEFINE_PROP_END_OF_LIST(),
 };
 
@@ -181,9 +185,9 @@ static void l2x0_class_init(ObjectClass *klass, void *data)
 }
 
 static const TypeInfo l2x0_info = {
-    .name = "l2x0",
+    .name = TYPE_ARM_L2X0,
     .parent = TYPE_SYS_BUS_DEVICE,
-    .instance_size = sizeof(l2x0_state),
+    .instance_size = sizeof(L2x0State),
     .class_init = l2x0_class_init,
 };