Merge tag 'pull-aspeed-20220622' of https://github.com/legoater/qemu into staging

aspeed queue:

* Extra avocado tests using buildroot images
* Conversion of the I2C model to the registerfield interface
* Support for the I2C new register interface on AST2600
* Various I2C enhancements
* I2C support for the AST1030
* Improvement of the Aspeed SMC and m25p80 qtest

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# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: A0F6 6548 F048 95EB FE6B  0B60 51A3 43C7 CFFB ECA1

* tag 'pull-aspeed-20220622' of https://github.com/legoater/qemu:
  hw: m25p80: fixing individual test failure when tests are running in isolation
  aspeed/hace: Add missing newlines to unimp messages
  aspeed/i2c: Enable SLAVE_ADDR_RX_MATCH always
  hw/i2c/aspeed: add DEV_ADDR in old register mode
  hw/i2c/aspeed: rework raise interrupt trace event
  aspeed: Add I2C buses to AST1030 model
  aspeed/i2c: Add ast1030 controller models
  aspeed: i2c: Move regs and helpers to header file
  aspeed: i2c: Add PKT_DONE IRQ to trace
  aspeed: i2c: Add new mode support
  aspeed: i2c: Use reg array instead of individual vars
  aspeed: i2c: Migrate to registerfields API
  hw/registerfields: Add shared fields macros
  test/avocado/machine_aspeed.py: Add an I2C RTC test
  test/avocado/machine_aspeed.py: Add I2C tests to ast2600-evb
  test/avocado/machine_aspeed.py: Add I2C tests to ast2500-evb
  test/avocado/machine_aspeed.py: Add tests using buildroot images
  test/avocado/machine_aspeed.py: Move OpenBMC tests
  aspeed: Remove fake RTC device on ast2500-evb

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

1 files changed, 2 insertions, 2 deletions

diff --git a/hw/misc/aspeed_hace.c b/hw/misc/aspeed_hace.c
index 4b5997e18f..731234b78c 100644
--- a/hw/misc/aspeed_hace.c
+++ b/hw/misc/aspeed_hace.c
@@ -340,12 +340,12 @@ static void aspeed_hace_write(void *opaque, hwaddr addr, uint64_t data,
 
         if ((data & HASH_HMAC_MASK)) {
             qemu_log_mask(LOG_UNIMP,
-                          "%s: HMAC engine command mode %"PRIx64" not implemented",
+                          "%s: HMAC engine command mode %"PRIx64" not implemented\n",
                           __func__, (data & HASH_HMAC_MASK) >> 8);
         }
         if (data & BIT(1)) {
             qemu_log_mask(LOG_UNIMP,
-                          "%s: Cascaded mode not implemented",
+                          "%s: Cascaded mode not implemented\n",
                           __func__);
         }
         algo = hash_algo_lookup(data);