diff options
| author | Peter Maydell | 2022-08-02 15:19:25 +0200 |
|---|---|---|
| committer | Philippe Mathieu-Daudé | 2022-08-08 23:43:11 +0200 |
| commit | 09d12c81ec5d8dc9208e5739d17a56c34be96247 (patch) | |
| tree | d40a96be4fe7863778f654666e3aae2bd5c979f1 /hw/misc/imx31_ccm.c | |
| parent | hw/mips/malta: turn off x86 specific features of PIIX4_PM (diff) | |
| download | qemu-09d12c81ec5d8dc9208e5739d17a56c34be96247.tar.gz qemu-09d12c81ec5d8dc9208e5739d17a56c34be96247.tar.xz qemu-09d12c81ec5d8dc9208e5739d17a56c34be96247.zip | |
hw/misc/grlib_ahb_apb_pnp: Support 8 and 16 bit accesses
In real hardware, the APB and AHB PNP data tables can be accessed
with byte and halfword reads as well as word reads. Our
implementation currently only handles word reads. Add support for
the 8 and 16 bit accesses. Note that we only need to handle aligned
accesses -- unaligned accesses should continue to trap, as happens on
hardware.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1132
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Frederic Konrad <fkonrad@amd.com>
Message-Id: <20220802131925.3380923-1-peter.maydell@linaro.org>
Tested-by: Tomasz Martyniak <gitlab.com/tom4r>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Diffstat (limited to 'hw/misc/imx31_ccm.c')
0 files changed, 0 insertions, 0 deletions