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| author | Peter Maydell | 2021-02-19 15:45:43 +0100 |
|---|---|---|
| committer | Peter Maydell | 2021-03-08 18:20:01 +0100 |
| commit | 446587a914cfa57c2ce529056a9ca2215bde7111 (patch) | |
| tree | de79db22acd634631366e7a1728119f0b337fced /hw/misc/stm32f4xx_exti.c | |
| parent | hw/arm/armsse.c: Use correct SYS_CONFIG0 register value for SSE-300 (diff) | |
| download | qemu-446587a914cfa57c2ce529056a9ca2215bde7111.tar.gz qemu-446587a914cfa57c2ce529056a9ca2215bde7111.tar.xz qemu-446587a914cfa57c2ce529056a9ca2215bde7111.zip | |
hw/misc/iotkit-sysinfo.c: Implement SYS_CONFIG1 and IIDR
For SSE-300, the SYSINFO register block has two new registers:
* SYS_CONFIG1 indicates the config for a potential CPU2 and CPU3;
since the SSE-300 can only be configured with a single CPU it
is always zero
* IIDR is the subsystem implementation identity register;
its value is set by the SoC integrator, so we plumb this in from
the armsse.c code as we do with SYS_VERSION and SYS_CONFIG
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210219144617.4782-11-peter.maydell@linaro.org
Diffstat (limited to 'hw/misc/stm32f4xx_exti.c')
0 files changed, 0 insertions, 0 deletions