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authorPhilippe Mathieu-Daudé2020-10-07 18:00:18 +0200
committerAlex Bennée2020-10-09 18:27:55 +0200
commit42a052333a6d31fa74b3f8c152bc433d869e09c4 (patch)
tree4f8c29b4fe0fc5c2333702ed6f1b3c2d3d5b1f39 /hw/misc
parentconfigure: fix performance regression due to PIC objects (diff)
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hw/misc/mips_cpc: Start vCPU when powered on
In commit 102ca9667d we set "start-powered-off" on all vCPUs included in the CPS (Coherent Processing System) but forgot to start the vCPUS on when they are powered on in the CPC (Cluster Power Controller). This fixes the following tests: $ avocado run tests/acceptance/machine_mips_malta.py (1/3) test_mips_malta_i6400_framebuffer_logo_1core: PASS (3.67 s) (2/3) test_mips_malta_i6400_framebuffer_logo_7cores: INTERRUPTED: Test interrupted by SIGTERM (30.22 s) (3/3) test_mips_malta_i6400_framebuffer_logo_8cores: INTERRUPTED: Test interrupted by SIGTERM (30.25 s) RESULTS : PASS 1 | ERROR 0 | FAIL 0 | SKIP 0 | WARN 0 | INTERRUPT 2 | CANCEL 0 Fixes: 102ca9667d ("mips/cps: Use start-powered-off CPUState property") Reported-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20201007113942.2523866-1-f4bug@amsat.org> Message-Id: <20201007160038.26953-3-alex.bennee@linaro.org>
Diffstat (limited to 'hw/misc')
-rw-r--r--hw/misc/mips_cpc.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/hw/misc/mips_cpc.c b/hw/misc/mips_cpc.c
index 2f7b2c9592..7c11fb3d44 100644
--- a/hw/misc/mips_cpc.c
+++ b/hw/misc/mips_cpc.c
@@ -38,6 +38,7 @@ static void mips_cpu_reset_async_work(CPUState *cs, run_on_cpu_data data)
MIPSCPCState *cpc = (MIPSCPCState *) data.host_ptr;
cpu_reset(cs);
+ cs->halted = 0;
cpc->vp_running |= 1ULL << cs->cpu_index;
}