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| author | Sebastian Huber | 2014-02-05 08:31:55 +0100 |
|---|---|---|
| committer | Peter Maydell | 2014-02-08 15:50:48 +0100 |
| commit | 69991d7dcbcf7f3fe38274bc67fcba3cbbfda0cf (patch) | |
| tree | 097276492e0349e104ab56269ddb29a80ce2c513 /hw/misc | |
| parent | hw/arm/allwinner-a10: initialize EMAC (diff) | |
| download | qemu-69991d7dcbcf7f3fe38274bc67fcba3cbbfda0cf.tar.gz qemu-69991d7dcbcf7f3fe38274bc67fcba3cbbfda0cf.tar.xz qemu-69991d7dcbcf7f3fe38274bc67fcba3cbbfda0cf.zip | |
arm/zynq: Add software system reset via SCLR
Support software-driven system reset via the register in the SCLR.
Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/misc')
| -rw-r--r-- | hw/misc/zynq_slcr.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/hw/misc/zynq_slcr.c b/hw/misc/zynq_slcr.c index e42a5b04ab..d1cc23303a 100644 --- a/hw/misc/zynq_slcr.c +++ b/hw/misc/zynq_slcr.c @@ -31,6 +31,8 @@ #define XILINX_LOCK_KEY 0x767b #define XILINX_UNLOCK_KEY 0xdf0d +#define R_PSS_RST_CTRL_SOFT_RST 0x1 + typedef enum { ARM_PLL_CTRL, DDR_PLL_CTRL, @@ -399,6 +401,9 @@ static void zynq_slcr_write(void *opaque, hwaddr offset, goto bad_reg; } s->reset[(offset - 0x200) / 4] = val; + if (offset == 0x200 && (val & R_PSS_RST_CTRL_SOFT_RST)) { + qemu_system_reset_request(); + } break; case 0x300: s->apu_ctrl = val; |