summaryrefslogtreecommitdiffstats
path: root/hw/msix.c
diff options
context:
space:
mode:
authorBlue Swirl2012-12-15 10:05:26 +0100
committerBlue Swirl2012-12-15 10:05:26 +0100
commit6d4e18925a65306afabaad7b63a4588c18919e99 (patch)
tree3d46feb2372756bc5dcb37641f3c8030431fcf23 /hw/msix.c
parenttarget-xtensa: fix ITLB/DTLB page protection flags (diff)
parentpseries: Increase default NVRAM size (diff)
downloadqemu-6d4e18925a65306afabaad7b63a4588c18919e99.tar.gz
qemu-6d4e18925a65306afabaad7b63a4588c18919e99.tar.xz
qemu-6d4e18925a65306afabaad7b63a4588c18919e99.zip
Merge branch 'ppc-for-upstream' of git://repo.or.cz/qemu/agraf
* 'ppc-for-upstream' of git://repo.or.cz/qemu/agraf: (40 commits) pseries: Increase default NVRAM size target-ppc: Don't use hwaddr to represent hardware state PPC: e500: pci: Export slot2irq calculation PPC: E500plat: Make a lot of PCI slots available PPC: E500: Move PCI slot information into params PPC: E500: Generate dt pci irq map dynamically PPC: E500: PCI: Make IRQ calculation more generic PPC: E500: PCI: Make first slot qdev settable openpic: Accelerate pending irq search openpic: fix minor coding style issues MSI-X: Fix endianness PPC: e500: Declare pci bridge as bridge PPC: e500: Add MSI support openpic: add Shared MSI support openpic: make brr1 model specific openpic: convert to qdev openpic: remove irq_out openpic: rename openpic_t to OpenPICState openpic: convert simple reg operations to builtin bitops openpic: remove unused type variable ...
Diffstat (limited to 'hw/msix.c')
-rw-r--r--hw/msix.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/hw/msix.c b/hw/msix.c
index 136ef09373..b57ae60491 100644
--- a/hw/msix.c
+++ b/hw/msix.c
@@ -180,8 +180,7 @@ static void msix_table_mmio_write(void *opaque, hwaddr addr,
static const MemoryRegionOps msix_table_mmio_ops = {
.read = msix_table_mmio_read,
.write = msix_table_mmio_write,
- /* TODO: MSIX should be LITTLE_ENDIAN. */
- .endianness = DEVICE_NATIVE_ENDIAN,
+ .endianness = DEVICE_LITTLE_ENDIAN,
.valid = {
.min_access_size = 4,
.max_access_size = 4,
@@ -198,8 +197,7 @@ static uint64_t msix_pba_mmio_read(void *opaque, hwaddr addr,
static const MemoryRegionOps msix_pba_mmio_ops = {
.read = msix_pba_mmio_read,
- /* TODO: MSIX should be LITTLE_ENDIAN. */
- .endianness = DEVICE_NATIVE_ENDIAN,
+ .endianness = DEVICE_LITTLE_ENDIAN,
.valid = {
.min_access_size = 4,
.max_access_size = 4,