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author | Klaus Jensen | 2021-06-17 20:55:42 +0200 |
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committer | Klaus Jensen | 2021-06-29 07:18:10 +0200 |
commit | 83d7ed5c570d4c1d5163951b3057cac2ae7da4ff (patch) | |
tree | fe21b9f16cfdc19d05f182447bc6f549f5335325 /hw/nvme/nvme.h | |
parent | hw/nvme: fix missing check for PMR capability (diff) | |
download | qemu-83d7ed5c570d4c1d5163951b3057cac2ae7da4ff.tar.gz qemu-83d7ed5c570d4c1d5163951b3057cac2ae7da4ff.tar.xz qemu-83d7ed5c570d4c1d5163951b3057cac2ae7da4ff.zip |
hw/nvme: fix pin-based interrupt behavior (again)
Jakub noticed[1] that, when using pin-based interrupts, the device will
unconditionally deasssert when any CQEs are acknowledged. However, the
pin should not be deasserted if other completion queues still holds
unacknowledged CQEs.
The bug is an artifact of commit ca247d35098d ("hw/block/nvme: fix
pin-based interrupt behavior") which fixed one bug but introduced
another. This is the third time someone tries to fix pin-based
interrupts (see commit 5e9aa92eb1a5 ("hw/block: Fix pin-based interrupt
behaviour of NVMe"))...
Third time's the charm, so fix it, again, by keeping track of how many
CQs have unacknowledged CQEs and only deassert when all are cleared.
[1]: <20210610114624.304681-1-jakub.jermar@kernkonzept.com>
Cc: qemu-stable@nongnu.org
Fixes: ca247d35098d ("hw/block/nvme: fix pin-based interrupt behavior")
Reported-by: Jakub Jermář <jakub.jermar@kernkonzept.com>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Reviewed-by: Keith Busch <kbusch@kernel.org>
Diffstat (limited to 'hw/nvme/nvme.h')
-rw-r--r-- | hw/nvme/nvme.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/hw/nvme/nvme.h b/hw/nvme/nvme.h index 2509b8b039..56f8eceed2 100644 --- a/hw/nvme/nvme.h +++ b/hw/nvme/nvme.h @@ -410,6 +410,7 @@ typedef struct NvmeCtrl { uint32_t max_q_ents; uint8_t outstanding_aers; uint32_t irq_status; + int cq_pending; uint64_t host_timestamp; /* Timestamp sent by the host */ uint64_t timestamp_set_qemu_clock_ms; /* QEMU clock time */ uint64_t starttime_ms; |