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| author | Tong Ho | 2021-10-15 22:35:31 +0200 |
|---|---|---|
| committer | Laurent Vivier | 2021-10-23 18:50:33 +0200 |
| commit | 512a63b2b00ee0e7bf99bda2d8e6ce807dfa32c2 (patch) | |
| tree | 7f886c9814e909043d266e407a673338310b07ea /hw/nvram | |
| parent | hw/nvram: Fix Memory Leak in Xilinx eFuse QOM (diff) | |
| download | qemu-512a63b2b00ee0e7bf99bda2d8e6ce807dfa32c2.tar.gz qemu-512a63b2b00ee0e7bf99bda2d8e6ce807dfa32c2.tar.xz qemu-512a63b2b00ee0e7bf99bda2d8e6ce807dfa32c2.zip | |
hw/nvram: Fix Memory Leak in Xilinx Versal eFuse device
Signed-off-by: Tong Ho <tong.ho@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20211015203532.2463705-3-tong.ho@xilinx.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Diffstat (limited to 'hw/nvram')
| -rw-r--r-- | hw/nvram/xlnx-versal-efuse-ctrl.c | 20 |
1 files changed, 15 insertions, 5 deletions
diff --git a/hw/nvram/xlnx-versal-efuse-ctrl.c b/hw/nvram/xlnx-versal-efuse-ctrl.c index d362376703..b35ba65ab5 100644 --- a/hw/nvram/xlnx-versal-efuse-ctrl.c +++ b/hw/nvram/xlnx-versal-efuse-ctrl.c @@ -439,9 +439,11 @@ static void efuse_pgm_addr_postw(RegisterInfo *reg, uint64_t val64) * up to guest to do so (or by reset). */ if (efuse_pgm_locked(s, bit)) { + g_autofree char *path = object_get_canonical_path(OBJECT(s)); + qemu_log_mask(LOG_GUEST_ERROR, "%s: Denied setting of efuse<%u, %u, %u>\n", - object_get_canonical_path(OBJECT(s)), + path, FIELD_EX32(bit, EFUSE_PGM_ADDR, PAGE), FIELD_EX32(bit, EFUSE_PGM_ADDR, ROW), FIELD_EX32(bit, EFUSE_PGM_ADDR, COLUMN)); @@ -478,9 +480,11 @@ static void efuse_rd_addr_postw(RegisterInfo *reg, uint64_t val64) s->regs[R_EFUSE_RD_DATA] = xlnx_versal_efuse_read_row(s->efuse, bit, &denied); if (denied) { + g_autofree char *path = object_get_canonical_path(OBJECT(s)); + qemu_log_mask(LOG_GUEST_ERROR, "%s: Denied reading of efuse<%u, %u>\n", - object_get_canonical_path(OBJECT(s)), + path, FIELD_EX32(bit, EFUSE_RD_ADDR, PAGE), FIELD_EX32(bit, EFUSE_RD_ADDR, ROW)); @@ -625,9 +629,11 @@ static void efuse_ctrl_reg_write(void *opaque, hwaddr addr, s = XLNX_VERSAL_EFUSE_CTRL(dev); if (addr != A_WR_LOCK && s->regs[R_WR_LOCK]) { + g_autofree char *path = object_get_canonical_path(OBJECT(s)); + qemu_log_mask(LOG_GUEST_ERROR, "%s[reg_0x%02lx]: Attempt to write locked register.\n", - object_get_canonical_path(OBJECT(s)), (long)addr); + path, (long)addr); } else { register_write_memory(opaque, addr, data, size); } @@ -681,16 +687,20 @@ static void efuse_ctrl_realize(DeviceState *dev, Error **errp) const uint32_t lks_sz = sizeof(XlnxEFuseLkSpec) / 2; if (!s->efuse) { + g_autofree char *path = object_get_canonical_path(OBJECT(s)); + error_setg(errp, "%s.efuse: link property not connected to XLNX-EFUSE", - object_get_canonical_path(OBJECT(dev))); + path); return; } /* Sort property-defined pgm-locks for bsearch lookup */ if ((s->extra_pg0_lock_n16 % lks_sz) != 0) { + g_autofree char *path = object_get_canonical_path(OBJECT(s)); + error_setg(errp, "%s.pg0-lock: array property item-count not multiple of %u", - object_get_canonical_path(OBJECT(dev)), lks_sz); + path, lks_sz); return; } |