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| author | Jonathan Cameron | 2022-06-16 16:51:24 +0200 |
|---|---|---|
| committer | Michael S. Tsirkin | 2022-06-16 18:54:57 +0200 |
| commit | 638b752da30a9daffb0c92166937a0cb777f9e23 (patch) | |
| tree | e85e72dd6e79802b479bb02d6c955e7deae13369 /hw/pci-bridge/cxl_downstream.c | |
| parent | Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging (diff) | |
| download | qemu-638b752da30a9daffb0c92166937a0cb777f9e23.tar.gz qemu-638b752da30a9daffb0c92166937a0cb777f9e23.tar.xz qemu-638b752da30a9daffb0c92166937a0cb777f9e23.zip | |
pci-bridge/cxl_upstream: Add a CXL switch upstream port
An initial simple upstream port emulation to allow the creation
of CXL switches. The Device ID has been allocated for this use.
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20220616145126.8002-2-Jonathan.Cameron@huawei.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/pci-bridge/cxl_downstream.c')
0 files changed, 0 insertions, 0 deletions