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authorPeter Maydell2018-11-06 12:43:18 +0100
committerPeter Maydell2018-11-06 12:43:18 +0100
commitb66db50f672015df53e0c1a317f6b0bb21d7d414 (patch)
tree965be0705574babe9ed36eb5894deb68224cddd1 /hw/pci-bridge/xio3130_downstream.c
parentoslib-posix: Use MAP_STACK in qemu_alloc_stack() on OpenBSD (diff)
parentvhost-scsi: prevent using uninitialized vqs (diff)
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Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging
pci, pc, virtio: fixes, features AMD IOMMU VAPIC support + fixes all over the place. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Mon 05 Nov 2018 18:24:10 GMT # gpg: using RSA key 281F0DB8D28D5469 # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: (33 commits) vhost-scsi: prevent using uninitialized vqs piix_pci: fix i440fx data sheet link piix: use TYPE_FOO constants than string constats i440fx: use ARRAY_SIZE for pam_regions pci_bridge: fix typo in comment hw/pci: Add missing include hw/pci-bridge/ioh3420: Remove unuseful header hw/pci-bridge/xio3130: Remove unused functions tests/bios-tables-test: add 64-bit PCI MMIO aperture round-up test on Q35 bios-tables-test: prepare expected files for mmio64 hw/pci-host/x86: extend the 64-bit PCI hole relative to the fw-assigned base hw/pci-host/x86: extract get_pci_hole64_start_value() helpers pci-testdev: add optional memory bar MAINTAINERS: list "tests/acpi-test-data" files in ACPI/SMBIOS section x86_iommu/amd: Enable Guest virtual APIC support x86_iommu/amd: Add interrupt remap support when VAPIC is enabled i386: acpi: add IVHD device entry for IOAPIC x86_iommu/amd: Add interrupt remap support when VAPIC is not enabled x86_iommu/amd: Prepare for interrupt remap support x86_iommu/amd: make the address space naming consistent with intel-iommu ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/pci-bridge/xio3130_downstream.c')
-rw-r--r--hw/pci-bridge/xio3130_downstream.c28
1 files changed, 1 insertions, 27 deletions
diff --git a/hw/pci-bridge/xio3130_downstream.c b/hw/pci-bridge/xio3130_downstream.c
index b202657954..467bbabe4c 100644
--- a/hw/pci-bridge/xio3130_downstream.c
+++ b/hw/pci-bridge/xio3130_downstream.c
@@ -23,7 +23,7 @@
#include "hw/pci/pci_ids.h"
#include "hw/pci/msi.h"
#include "hw/pci/pcie.h"
-#include "xio3130_downstream.h"
+#include "hw/pci/pcie_port.h"
#include "qapi/error.h"
#define PCI_DEVICE_ID_TI_XIO3130D 0x8233 /* downstream port */
@@ -127,32 +127,6 @@ static void xio3130_downstream_exitfn(PCIDevice *d)
pci_bridge_exitfn(d);
}
-PCIESlot *xio3130_downstream_init(PCIBus *bus, int devfn, bool multifunction,
- const char *bus_name, pci_map_irq_fn map_irq,
- uint8_t port, uint8_t chassis,
- uint16_t slot)
-{
- PCIDevice *d;
- PCIBridge *br;
- DeviceState *qdev;
-
- d = pci_create_multifunction(bus, devfn, multifunction,
- "xio3130-downstream");
- if (!d) {
- return NULL;
- }
- br = PCI_BRIDGE(d);
-
- qdev = DEVICE(d);
- pci_bridge_map_irq(br, bus_name, map_irq);
- qdev_prop_set_uint8(qdev, "port", port);
- qdev_prop_set_uint8(qdev, "chassis", chassis);
- qdev_prop_set_uint16(qdev, "slot", slot);
- qdev_init_nofail(qdev);
-
- return PCIE_SLOT(d);
-}
-
static Property xio3130_downstream_props[] = {
DEFINE_PROP_BIT(COMPAT_PROP_PCP, PCIDevice, cap_present,
QEMU_PCIE_SLTCAP_PCP_BITNR, true),