diff options
| author | Cao jin | 2016-06-10 11:54:23 +0200 |
|---|---|---|
| committer | Michael S. Tsirkin | 2016-06-17 02:28:03 +0200 |
| commit | 52ea63dea465575ccd71d52c3461b1b7d9f50ce0 (patch) | |
| tree | 383646d945658fc740b9dc251bb15d38fc25ccdd /hw/pci-bridge/xio3130_upstream.c | |
| parent | pci core: assert ENOSPC when add capability (diff) | |
| download | qemu-52ea63dea465575ccd71d52c3461b1b7d9f50ce0.tar.gz qemu-52ea63dea465575ccd71d52c3461b1b7d9f50ce0.tar.xz qemu-52ea63dea465575ccd71d52c3461b1b7d9f50ce0.zip | |
fix some coding style problems
It has:
1. More newlines make the code block well separated.
2. Add more comments for msi_init.
3. Fix a indentation in vmxnet3.c.
4. ioh3420 & xio3130_downstream: put PCI Express capability init function
together, make it more readable.
cc: Michael S. Tsirkin <mst@redhat.com>
cc: Markus Armbruster <armbru@redhat.com>
cc: Marcel Apfelbaum <marcel@redhat.com>
cc: Dmitry Fleytman <dmitry@daynix.com>
cc: Jason Wang <jasowang@redhat.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Marcel Apfelbaum <marcel@redhat.com>
Signed-off-by: Cao jin <caoj.fnst@cn.fujitsu.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/pci-bridge/xio3130_upstream.c')
| -rw-r--r-- | hw/pci-bridge/xio3130_upstream.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/hw/pci-bridge/xio3130_upstream.c b/hw/pci-bridge/xio3130_upstream.c index 164ef58c46..d97684474f 100644 --- a/hw/pci-bridge/xio3130_upstream.c +++ b/hw/pci-bridge/xio3130_upstream.c @@ -66,11 +66,13 @@ static int xio3130_upstream_initfn(PCIDevice *d) if (rc < 0) { goto err_bridge; } + rc = pci_bridge_ssvid_init(d, XIO3130_SSVID_OFFSET, XIO3130_SSVID_SVID, XIO3130_SSVID_SSID); if (rc < 0) { goto err_bridge; } + rc = pcie_cap_init(d, XIO3130_EXP_OFFSET, PCI_EXP_TYPE_UPSTREAM, p->port); if (rc < 0) { @@ -78,6 +80,7 @@ static int xio3130_upstream_initfn(PCIDevice *d) } pcie_cap_flr_init(d); pcie_cap_deverr_init(d); + rc = pcie_aer_init(d, XIO3130_AER_OFFSET, PCI_ERR_SIZEOF); if (rc < 0) { goto err; |