diff options
| author | Mao Zhongyi | 2017-06-27 08:16:52 +0200 |
|---|---|---|
| committer | Michael S. Tsirkin | 2017-07-03 21:29:49 +0200 |
| commit | f8cd1b0201c41d88bb97dcafb80348a0e88d8805 (patch) | |
| tree | 870bf5bd0c61a8193a878dfbe508b14ca59a5c1b /hw/pci-bridge/xio3130_upstream.c | |
| parent | pci: Replace pci_add_capability2() with pci_add_capability() (diff) | |
| download | qemu-f8cd1b0201c41d88bb97dcafb80348a0e88d8805.tar.gz qemu-f8cd1b0201c41d88bb97dcafb80348a0e88d8805.tar.xz qemu-f8cd1b0201c41d88bb97dcafb80348a0e88d8805.zip | |
pci: Convert to realize
Convert i82801b11, io3130_upstream, io3130_downstream and
pcie_root_port devices to realize.
Cc: mst@redhat.com
Cc: marcel@redhat.com
Cc: armbru@redhat.com
Signed-off-by: Mao Zhongyi <maozy.fnst@cn.fujitsu.com>
Reviewed-by: Marcel Apfelbaum <marcel@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/pci-bridge/xio3130_upstream.c')
| -rw-r--r-- | hw/pci-bridge/xio3130_upstream.c | 20 |
1 files changed, 9 insertions, 11 deletions
diff --git a/hw/pci-bridge/xio3130_upstream.c b/hw/pci-bridge/xio3130_upstream.c index 401c78452b..a052224bbf 100644 --- a/hw/pci-bridge/xio3130_upstream.c +++ b/hw/pci-bridge/xio3130_upstream.c @@ -53,32 +53,32 @@ static void xio3130_upstream_reset(DeviceState *qdev) pcie_cap_deverr_reset(d); } -static int xio3130_upstream_initfn(PCIDevice *d) +static void xio3130_upstream_realize(PCIDevice *d, Error **errp) { PCIEPort *p = PCIE_PORT(d); int rc; - Error *err = NULL; pci_bridge_initfn(d, TYPE_PCIE_BUS); pcie_port_init_reg(d); rc = msi_init(d, XIO3130_MSI_OFFSET, XIO3130_MSI_NR_VECTOR, XIO3130_MSI_SUPPORTED_FLAGS & PCI_MSI_FLAGS_64BIT, - XIO3130_MSI_SUPPORTED_FLAGS & PCI_MSI_FLAGS_MASKBIT, &err); + XIO3130_MSI_SUPPORTED_FLAGS & PCI_MSI_FLAGS_MASKBIT, + errp); if (rc < 0) { assert(rc == -ENOTSUP); - error_report_err(err); goto err_bridge; } rc = pci_bridge_ssvid_init(d, XIO3130_SSVID_OFFSET, - XIO3130_SSVID_SVID, XIO3130_SSVID_SSID); + XIO3130_SSVID_SVID, XIO3130_SSVID_SSID, + errp); if (rc < 0) { goto err_bridge; } rc = pcie_cap_init(d, XIO3130_EXP_OFFSET, PCI_EXP_TYPE_UPSTREAM, - p->port); + p->port, errp); if (rc < 0) { goto err_msi; } @@ -86,13 +86,12 @@ static int xio3130_upstream_initfn(PCIDevice *d) pcie_cap_deverr_init(d); rc = pcie_aer_init(d, PCI_ERR_VER, XIO3130_AER_OFFSET, - PCI_ERR_SIZEOF, &err); + PCI_ERR_SIZEOF, errp); if (rc < 0) { - error_report_err(err); goto err; } - return 0; + return; err: pcie_cap_exit(d); @@ -100,7 +99,6 @@ err_msi: msi_uninit(d); err_bridge: pci_bridge_exitfn(d); - return rc; } static void xio3130_upstream_exitfn(PCIDevice *d) @@ -153,7 +151,7 @@ static void xio3130_upstream_class_init(ObjectClass *klass, void *data) k->is_express = 1; k->is_bridge = 1; k->config_write = xio3130_upstream_write_config; - k->init = xio3130_upstream_initfn; + k->realize = xio3130_upstream_realize; k->exit = xio3130_upstream_exitfn; k->vendor_id = PCI_VENDOR_ID_TI; k->device_id = PCI_DEVICE_ID_TI_XIO3130U; |