summaryrefslogtreecommitdiffstats
path: root/hw/pci-host/grackle.c
diff options
context:
space:
mode:
authorMark Cave-Ayland2018-03-06 23:01:57 +0100
committerDavid Gibson2018-04-27 10:05:22 +0200
commita94e5f998bf353e848a9ae7c679b06fff36b4698 (patch)
tree53fa6247e01aa50a4cf357d42bfb74ffc54ac719 /hw/pci-host/grackle.c
parentgrackle: remove deprecated pci_grackle_init() function (diff)
downloadqemu-a94e5f998bf353e848a9ae7c679b06fff36b4698.tar.gz
qemu-a94e5f998bf353e848a9ae7c679b06fff36b4698.tar.xz
qemu-a94e5f998bf353e848a9ae7c679b06fff36b4698.zip
grackle: move PCI IO (ISA) memory region into the grackle device
This simplifies the Old World machine to simply mapping the ISA memory region into the main address space. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'hw/pci-host/grackle.c')
-rw-r--r--hw/pci-host/grackle.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/hw/pci-host/grackle.c b/hw/pci-host/grackle.c
index e4583d493b..4810a4de79 100644
--- a/hw/pci-host/grackle.c
+++ b/hw/pci-host/grackle.c
@@ -41,6 +41,7 @@ typedef struct GrackleState {
qemu_irq irqs[4];
MemoryRegion pci_mmio;
MemoryRegion pci_hole;
+ MemoryRegion pci_io;
} GrackleState;
/* Don't know if this matches real hardware, but it agrees with OHW. */
@@ -76,7 +77,7 @@ static void grackle_realize(DeviceState *dev, Error **errp)
pci_grackle_map_irq,
s,
&s->pci_mmio,
- get_system_io(),
+ &s->pci_io,
0, 4, TYPE_PCI_BUS);
pci_create_simple(phb->bus, 0, "grackle");
@@ -90,6 +91,9 @@ static void grackle_init(Object *obj)
PCIHostState *phb = PCI_HOST_BRIDGE(obj);
memory_region_init(&s->pci_mmio, OBJECT(s), "pci-mmio", 0x100000000ULL);
+ memory_region_init_io(&s->pci_io, OBJECT(s), &unassigned_io_ops, obj,
+ "pci-isa-mmio", 0x00200000);
+
memory_region_init_alias(&s->pci_hole, OBJECT(s), "pci-hole", &s->pci_mmio,
0x80000000ULL, 0x7e000000ULL);
@@ -106,6 +110,7 @@ static void grackle_init(Object *obj)
sysbus_init_mmio(sbd, &phb->conf_mem);
sysbus_init_mmio(sbd, &phb->data_mem);
sysbus_init_mmio(sbd, &s->pci_hole);
+ sysbus_init_mmio(sbd, &s->pci_io);
}
static void grackle_pci_realize(PCIDevice *d, Error **errp)