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author | aurel32 | 2008-12-18 23:43:33 +0100 |
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committer | aurel32 | 2008-12-18 23:43:33 +0100 |
commit | 8098ed414ada4265f646e94d65eca063b3689f50 (patch) | |
tree | 4bcb312026eee379d04427b54edae8a42289f186 /hw/pci.h | |
parent | target-ppc: fix type of spe_acc. (diff) | |
download | qemu-8098ed414ada4265f646e94d65eca063b3689f50.tar.gz qemu-8098ed414ada4265f646e94d65eca063b3689f50.tar.xz qemu-8098ed414ada4265f646e94d65eca063b3689f50.zip |
PCI: Mask writes to RO bits in the status reg of PCI config space
The Status register in the PCI config space has some read-only bits.
Any writes to those bits should be masked out.
Signed-off-by: Amit Shah <amit.shah@redhat.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6091 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/pci.h')
-rw-r--r-- | hw/pci.h | 15 |
1 files changed, 15 insertions, 0 deletions
@@ -54,6 +54,21 @@ typedef struct PCIIORegion { #define PCI_MIN_GNT 0x3e /* 8 bits */ #define PCI_MAX_LAT 0x3f /* 8 bits */ +/* Bits in the PCI Status Register (PCI 2.3 spec) */ +#define PCI_STATUS_RESERVED1 0x007 +#define PCI_STATUS_INT_STATUS 0x008 +#define PCI_STATUS_CAPABILITIES 0x010 +#define PCI_STATUS_66MHZ 0x020 +#define PCI_STATUS_RESERVED2 0x040 +#define PCI_STATUS_FAST_BACK 0x080 +#define PCI_STATUS_DEVSEL 0x600 + +#define PCI_STATUS_RESERVED_MASK_LO (PCI_STATUS_RESERVED1 | \ + PCI_STATUS_INT_STATUS | PCI_STATUS_CAPABILITIES | \ + PCI_STATUS_66MHZ | PCI_STATUS_RESERVED2 | PCI_STATUS_FAST_BACK) + +#define PCI_STATUS_RESERVED_MASK_HI (PCI_STATUS_DEVSEL >> 8) + struct PCIDevice { /* PCI config space */ uint8_t config[256]; |