diff options
| author | Peter Maydell | 2018-08-20 12:24:32 +0200 |
|---|---|---|
| committer | Peter Maydell | 2018-08-20 12:24:32 +0200 |
| commit | aec4dd09f172ee64c19222b78269d5952fd9c1dc (patch) | |
| tree | ca949782d84fcbed0980f521f2771d3fcf60c36f /hw/pci/msix.c | |
| parent | target/arm: Implement ESR_EL2/HSR for AArch32 and no-EL2 (diff) | |
| download | qemu-aec4dd09f172ee64c19222b78269d5952fd9c1dc.tar.gz qemu-aec4dd09f172ee64c19222b78269d5952fd9c1dc.tar.xz qemu-aec4dd09f172ee64c19222b78269d5952fd9c1dc.zip | |
target/arm: Permit accesses to ELR_Hyp from Hyp mode via MSR/MRS (banked)
The MSR (banked) and MRS (banked) instructions allow accesses to ELR_Hyp
from either Monitor or Hyp mode. Our translate time check
was overly strict and only permitted access from Monitor mode.
The runtime check we do in msr_mrs_banked_exc_checks() had the
correct code in it, but never got there because of the earlier
"currmode == tgtmode" check. Special case ELR_Hyp.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Luc Michel <luc.michel@greensocs.com>
Message-id: 20180814124254.5229-9-peter.maydell@linaro.org
Diffstat (limited to 'hw/pci/msix.c')
0 files changed, 0 insertions, 0 deletions