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authorMark Cave-Ayland2018-03-06 21:30:50 +0100
committerDavid Gibson2018-04-27 10:05:22 +0200
commit0f4b5415c31ed1fee02f5826fe0d2d585806fa95 (patch)
treee625032c947ec7a0fef073e18361b30c5a436764 /hw/ppc/mac.h
parentuninorth: move uninorth definitions into uninorth.h (diff)
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uninorth: alter pci_pmac_init() and pci_pmac_u3_init() to return uninorth device
This is in preparation for moving the device wiring into the New World machine. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'hw/ppc/mac.h')
-rw-r--r--hw/ppc/mac.h10
1 files changed, 6 insertions, 4 deletions
diff --git a/hw/ppc/mac.h b/hw/ppc/mac.h
index a02f797598..fcf13cb757 100644
--- a/hw/ppc/mac.h
+++ b/hw/ppc/mac.h
@@ -31,6 +31,8 @@
#include "hw/ide/internal.h"
#include "hw/input/adb.h"
#include "hw/misc/mos6522.h"
+#include "hw/pci/pci_host.h"
+#include "hw/pci-host/uninorth.h"
/* SMP is not enabled, for now */
#define MAX_CPUS 1
@@ -86,12 +88,12 @@ PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic,
MemoryRegion *address_space_io);
/* UniNorth PCI */
-PCIBus *pci_pmac_init(qemu_irq *pic,
- MemoryRegion *address_space_mem,
- MemoryRegion *address_space_io);
-PCIBus *pci_pmac_u3_init(qemu_irq *pic,
+UNINState *pci_pmac_init(qemu_irq *pic,
MemoryRegion *address_space_mem,
MemoryRegion *address_space_io);
+UNINState *pci_pmac_u3_init(qemu_irq *pic,
+ MemoryRegion *address_space_mem,
+ MemoryRegion *address_space_io);
/* Mac NVRAM */
#define TYPE_MACIO_NVRAM "macio-nvram"