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authorMark Cave-Ayland2020-12-29 18:56:15 +0100
committerMark Cave-Ayland2021-01-13 13:20:37 +0100
commit370022ce313d0e797c969bd5be2be545c97f004d (patch)
tree48e8fde8e4207c29f7993cd57e4d388451741672 /hw/ppc/mac_oldworld.c
parentmac_oldworld: move initialisation of grackle before heathrow (diff)
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macio: move heathrow PIC inside macio-oldworld device
The heathrow PIC is located within the macio device on real hardware so make it a child of the macio-oldworld device. This also removes the need for setting and checking a separate PIC object property link on the macio-oldworld device which currently causes the automated QOM introspection tests to fail. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Message-Id: <20201229175619.6051-4-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Diffstat (limited to 'hw/ppc/mac_oldworld.c')
-rw-r--r--hw/ppc/mac_oldworld.c66
1 files changed, 32 insertions, 34 deletions
diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c
index e58e0525fe..44ee99be88 100644
--- a/hw/ppc/mac_oldworld.c
+++ b/hw/ppc/mac_oldworld.c
@@ -98,7 +98,7 @@ static void ppc_heathrow_init(MachineState *machine)
MACIOIDEState *macio_ide;
ESCCState *escc;
SysBusDevice *s;
- DeviceState *dev, *pic_dev;
+ DeviceState *dev, *pic_dev, *grackle_dev;
BusState *adb_bus;
uint64_t bios_addr;
int bios_size;
@@ -227,10 +227,17 @@ static void ppc_heathrow_init(MachineState *machine)
}
}
+ /* Timebase Frequency */
+ if (kvm_enabled()) {
+ tbfreq = kvmppc_get_tbfreq();
+ } else {
+ tbfreq = TBFREQ;
+ }
+
/* Grackle PCI host bridge */
- dev = qdev_new(TYPE_GRACKLE_PCI_HOST_BRIDGE);
- qdev_prop_set_uint32(dev, "ofw-addr", 0x80000000);
- s = SYS_BUS_DEVICE(dev);
+ grackle_dev = qdev_new(TYPE_GRACKLE_PCI_HOST_BRIDGE);
+ qdev_prop_set_uint32(grackle_dev, "ofw-addr", 0x80000000);
+ s = SYS_BUS_DEVICE(grackle_dev);
sysbus_realize_and_unref(s, &error_fatal);
sysbus_mmio_map(s, 0, GRACKLE_BASE);
@@ -242,14 +249,30 @@ static void ppc_heathrow_init(MachineState *machine)
memory_region_add_subregion(get_system_memory(), 0xfe000000,
sysbus_mmio_get_region(s, 3));
- /* XXX: we register only 1 output pin for heathrow PIC */
- pic_dev = qdev_new(TYPE_HEATHROW);
- sysbus_realize_and_unref(SYS_BUS_DEVICE(pic_dev), &error_fatal);
+ pci_bus = PCI_HOST_BRIDGE(grackle_dev)->bus;
+
+ /* MacIO */
+ macio = pci_new(PCI_DEVFN(16, 0), TYPE_OLDWORLD_MACIO);
+ dev = DEVICE(macio);
+ qdev_prop_set_uint64(dev, "frequency", tbfreq);
+
+ escc = ESCC(object_resolve_path_component(OBJECT(macio), "escc"));
+ qdev_prop_set_chr(DEVICE(escc), "chrA", serial_hd(0));
+ qdev_prop_set_chr(DEVICE(escc), "chrB", serial_hd(1));
+
+ pci_realize_and_unref(macio, pci_bus, &error_fatal);
+
+ pic_dev = DEVICE(object_resolve_path_component(OBJECT(macio), "pic"));
+ for (i = 0; i < 4; i++) {
+ qdev_connect_gpio_out(grackle_dev, i,
+ qdev_get_gpio_in(pic_dev, 0x15 + i));
+ }
/* Connect the heathrow PIC outputs to the 6xx bus */
for (i = 0; i < smp_cpus; i++) {
switch (PPC_INPUT(env)) {
case PPC_FLAGS_INPUT_6xx:
+ /* XXX: we register only 1 output pin for heathrow PIC */
qdev_connect_gpio_out(pic_dev, 0,
((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]);
break;
@@ -259,40 +282,14 @@ static void ppc_heathrow_init(MachineState *machine)
}
}
- /* Timebase Frequency */
- if (kvm_enabled()) {
- tbfreq = kvmppc_get_tbfreq();
- } else {
- tbfreq = TBFREQ;
- }
-
- for (i = 0; i < 4; i++) {
- qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(pic_dev, 0x15 + i));
- }
-
- pci_bus = PCI_HOST_BRIDGE(dev)->bus;
-
pci_vga_init(pci_bus);
for (i = 0; i < nb_nics; i++) {
pci_nic_init_nofail(&nd_table[i], pci_bus, "ne2k_pci", NULL);
}
+ /* MacIO IDE */
ide_drive_get(hd, ARRAY_SIZE(hd));
-
- /* MacIO */
- macio = pci_new(PCI_DEVFN(16, 0), TYPE_OLDWORLD_MACIO);
- dev = DEVICE(macio);
- qdev_prop_set_uint64(dev, "frequency", tbfreq);
- object_property_set_link(OBJECT(macio), "pic", OBJECT(pic_dev),
- &error_abort);
-
- escc = ESCC(object_resolve_path_component(OBJECT(macio), "escc"));
- qdev_prop_set_chr(DEVICE(escc), "chrA", serial_hd(0));
- qdev_prop_set_chr(DEVICE(escc), "chrB", serial_hd(1));
-
- pci_realize_and_unref(macio, pci_bus, &error_fatal);
-
macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
"ide[0]"));
macio_ide_init_drives(macio_ide, hd);
@@ -301,6 +298,7 @@ static void ppc_heathrow_init(MachineState *machine)
"ide[1]"));
macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]);
+ /* MacIO CUDA/ADB */
dev = DEVICE(object_resolve_path_component(OBJECT(macio), "cuda"));
adb_bus = qdev_get_child_bus(dev, "adb.0");
dev = qdev_new(TYPE_ADB_KEYBOARD);