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authorPeter Maydell2021-01-08 18:12:11 +0100
committerDavid Gibson2021-01-19 00:20:29 +0100
commit71c3c44bc3e4b516efc868b05237aabefbf20fa8 (patch)
tree27b52888d3f8ace8d681bcd4f876afffc9004dd1 /hw/ppc/ppc405.h
parenthw/intc/ppc-uic: Make default dcr-base 0xc0, not 0x30 (diff)
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hw/ppc/ppc405_uc: Drop use of ppcuic_init()
Switch the ppc405_uc boards to directly creating and configuring the UIC, rather than doing it via the old ppcuic_init() helper function. We retain the API feature of ppc405ep_init() where it passes back something allowing the callers to wire up devices to the UIC if they need to, even though neither of the callsites currently makes use of this ability -- instead of passing back the qemu_irq array we pass back the UIC DeviceState. This fixes a trivial Coverity-detected memory leak where we were leaking the array of IRQs returned by ppcuic_init(). Fixes: Coverity CID 1421922 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20210108171212.16500-4-peter.maydell@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'hw/ppc/ppc405.h')
-rw-r--r--hw/ppc/ppc405.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/ppc/ppc405.h b/hw/ppc/ppc405.h
index e6c702f7e0..c58f739886 100644
--- a/hw/ppc/ppc405.h
+++ b/hw/ppc/ppc405.h
@@ -66,7 +66,7 @@ CPUPPCState *ppc405ep_init(MemoryRegion *address_space_mem,
MemoryRegion ram_memories[2],
hwaddr ram_bases[2],
hwaddr ram_sizes[2],
- uint32_t sysclk, qemu_irq **picp,
+ uint32_t sysclk, DeviceState **uicdev,
int do_init);
#endif /* PPC405_H */