diff options
| author | Cédric Le Goater | 2018-12-17 23:34:43 +0100 |
|---|---|---|
| committer | David Gibson | 2018-12-20 23:40:43 +0100 |
| commit | 3ba3d0bc338262f5a23c17e2b6e899da59a544d6 (patch) | |
| tree | 5b196bbc63959e163f424c84a781c0f69b30f774 /hw/ppc/spapr_cpu_core.c | |
| parent | spapr: add an extra OV5 field to the sPAPR IRQ backend (diff) | |
| download | qemu-3ba3d0bc338262f5a23c17e2b6e899da59a544d6.tar.gz qemu-3ba3d0bc338262f5a23c17e2b6e899da59a544d6.tar.xz qemu-3ba3d0bc338262f5a23c17e2b6e899da59a544d6.zip | |
spapr: introduce an 'ic-mode' machine option
This option is used to select the interrupt controller mode (XICS or
XIVE) with which the machine will operate. XICS being the default
mode for now.
When running a machine with the XIVE interrupt mode backend, the guest
OS is required to have support for the XIVE exploitation mode. In the
case of legacy OS, the mode selected by CAS should be XICS and the OS
should fail to boot. However, QEMU could possibly detect it, terminate
the boot process and reset to stop in the SLOF firmware. This is not
yet handled.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'hw/ppc/spapr_cpu_core.c')
| -rw-r--r-- | hw/ppc/spapr_cpu_core.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index 1811cd48db..82666436e9 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -214,7 +214,6 @@ static void spapr_cpu_core_unrealize(DeviceState *dev, Error **errp) static void spapr_realize_vcpu(PowerPCCPU *cpu, sPAPRMachineState *spapr, sPAPRCPUCore *sc, Error **errp) { - sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr); CPUPPCState *env = &cpu->env; CPUState *cs = CPU(cpu); Error *local_err = NULL; @@ -233,7 +232,7 @@ static void spapr_realize_vcpu(PowerPCCPU *cpu, sPAPRMachineState *spapr, qemu_register_reset(spapr_cpu_reset, cpu); spapr_cpu_reset(cpu); - cpu->intc = smc->irq->cpu_intc_create(spapr, OBJECT(cpu), &local_err); + cpu->intc = spapr->irq->cpu_intc_create(spapr, OBJECT(cpu), &local_err); if (local_err) { goto error_unregister; } |