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| author | Cédric Le Goater | 2019-01-02 06:57:34 +0100 |
|---|---|---|
| committer | David Gibson | 2019-01-08 23:28:14 +0100 |
| commit | 8fa1f4ef3828e71bfec1de2934c99e35c25709b6 (patch) | |
| tree | 4dd44e69fc7b5f903256d979df0ba1e678ddb0bd /hw/ppc/spapr_cpu_core.c | |
| parent | spapr/xive: simplify the sPAPR IRQ qirq method for XIVE (diff) | |
| download | qemu-8fa1f4ef3828e71bfec1de2934c99e35c25709b6.tar.gz qemu-8fa1f4ef3828e71bfec1de2934c99e35c25709b6.tar.xz qemu-8fa1f4ef3828e71bfec1de2934c99e35c25709b6.zip | |
spapr: modify the prototype of the cpu_intc_create() method
Today, the interrupt presenter is linked to a CPU using the
cpu_intc_create() method of the sPAPR IRQ backend. The resulting
object is assigned to the PowerPCCPU 'intc' pointer whatever the
interrupt mode, XICS or XIVE.
To support the 'dual' interrupt mode, we will need to distinguish
between the two presenter objects and for that, we plan to introduce a
second interrupt presenter object pointer under the PowerPCCPU. The
modifications below move the assignment of the presenter object under
the cpu_intc_create() method to prepare ground for the future changes.
Both sPAPR and PowerNV machines are impacted.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'hw/ppc/spapr_cpu_core.c')
| -rw-r--r-- | hw/ppc/spapr_cpu_core.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index 82666436e9..2739b2a4b8 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -232,7 +232,7 @@ static void spapr_realize_vcpu(PowerPCCPU *cpu, sPAPRMachineState *spapr, qemu_register_reset(spapr_cpu_reset, cpu); spapr_cpu_reset(cpu); - cpu->intc = spapr->irq->cpu_intc_create(spapr, OBJECT(cpu), &local_err); + spapr->irq->cpu_intc_create(spapr, cpu, &local_err); if (local_err) { goto error_unregister; } |