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| author | Suraj Jitindar Singh | 2017-03-29 07:43:45 +0200 |
|---|---|---|
| committer | David Gibson | 2017-04-26 04:00:42 +0200 |
| commit | ccd531b9c9de9cc497bd718104bf71b44bdbee45 (patch) | |
| tree | 7d6a5e5529df226615820f7935a528d0e0970bee /hw/ppc/spapr_cpu_core.c | |
| parent | spapr_pci: Removed unused include (diff) | |
| download | qemu-ccd531b9c9de9cc497bd718104bf71b44bdbee45.tar.gz qemu-ccd531b9c9de9cc497bd718104bf71b44bdbee45.tar.xz qemu-ccd531b9c9de9cc497bd718104bf71b44bdbee45.zip | |
target/ppc: Add ibm,processor-radix-AP-encodings for TCG
The ibm,processor-radix-AP-encodings device tree property of the cpu node
is used to specify the radix mode supported page sizes of the processor
to the guest os. Contained in the top 3 bits of the msb is the actual
page size (AP) encoding associated with the corresponding radix mode
supported page size. Add this property for a TCG guest, note the TCG code
is capable of translating any format so just add the 4 default page sizes.
The ibm,processor-radix-AP-encodings device tree property is defined as:
One to n cells in ascending order of radix mode supported page sizes
encoded as BE ints (32bit on ppc) in the form:
0bxxxyyyyyyyyyyyyyyyyyyyyyyyyyyyyy
- 0bxxx -> AP encoding
- 0byyyyyyyyyyyyyyyyyyyyyyyyyyyyy -> supported page size encoded as a shift
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'hw/ppc/spapr_cpu_core.c')
0 files changed, 0 insertions, 0 deletions