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authorPeter Maydell2018-06-22 16:14:08 +0200
committerPeter Maydell2018-06-22 16:14:08 +0200
commitc52e53f429aa562539f5da2e7c21c66c6f9a8a16 (patch)
tree796b50aff53f4895e1d83708756a97ff37e76e97 /hw/ppc/spapr_pci.c
parentnbd/server: Silence gcc false positive (diff)
parentspapr: Don't rewrite mmu capabilities in KVM mode (diff)
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Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-3.0-20180622' into staging
ppc patch queue 2018-06-22 Another assorted patch of patches for ppc and spapr. * Rework of guest pagesize handling for ppc, which avoids guest visibly different behaviour between accelerators * A number of Pnv cleanups, working towards more complete POWER9 support * Migration of VPA data, a significant bugfix # gpg: Signature made Fri 22 Jun 2018 05:23:16 BST # gpg: using RSA key 6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dgibson/tags/ppc-for-3.0-20180622: (23 commits) spapr: Don't rewrite mmu capabilities in KVM mode spapr: Limit available pagesizes to provide a consistent guest environment target/ppc: Add ppc_hash64_filter_pagesizes() spapr: Use maximum page size capability to simplify memory backend checking spapr: Maximum (HPT) pagesize property pseries: Update SLOF firmware image to qemu-slof-20180621 target/ppc: Add missing opcode for icbt on PPC440 ppc4xx_i2c: Implement directcntl register ppc4xx_i2c: Remove unimplemented sdata and intr registers sm501: Fix hardware cursor color conversion fpu_helper.c: fix helper_fpscr_clrbit() function spapr: remove unused spapr_irq routines spapr: split the IRQ allocation sequence target/ppc: Add kvmppc_hpt_needs_host_contiguous_pages() helper spapr: Add cpu_apply hook to capabilities spapr: Compute effective capability values earlier target/ppc: Allow cpu compatiblity checks based on type, not instance ppc/pnv: consolidate the creation of the ISA bus device tree ppc/pnv: introduce Pnv8Chip and Pnv9Chip models spapr_cpu_core: migrate VPA related state ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/ppc/spapr_pci.c')
-rw-r--r--hw/ppc/spapr_pci.c23
1 files changed, 20 insertions, 3 deletions
diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
index f936ce63ef..497b896c7d 100644
--- a/hw/ppc/spapr_pci.c
+++ b/hw/ppc/spapr_pci.c
@@ -279,6 +279,7 @@ static void rtas_ibm_change_msi(PowerPCCPU *cpu, sPAPRMachineState *spapr,
spapr_pci_msi *msi;
int *config_addr_key;
Error *err = NULL;
+ int i;
/* Fins sPAPRPHBState */
phb = spapr_pci_find_phb(spapr, buid);
@@ -371,8 +372,7 @@ static void rtas_ibm_change_msi(PowerPCCPU *cpu, sPAPRMachineState *spapr,
}
/* Allocate MSIs */
- irq = spapr_irq_alloc_block(spapr, req_num, false,
- ret_intr_type == RTAS_TYPE_MSI, &err);
+ irq = spapr_irq_find(spapr, req_num, ret_intr_type == RTAS_TYPE_MSI, &err);
if (err) {
error_reportf_err(err, "Can't allocate MSIs for device %x: ",
config_addr);
@@ -380,6 +380,16 @@ static void rtas_ibm_change_msi(PowerPCCPU *cpu, sPAPRMachineState *spapr,
return;
}
+ for (i = 0; i < req_num; i++) {
+ spapr_irq_claim(spapr, irq + i, false, &err);
+ if (err) {
+ error_reportf_err(err, "Can't allocate MSIs for device %x: ",
+ config_addr);
+ rtas_st(rets, 0, RTAS_OUT_HW_ERROR);
+ return;
+ }
+ }
+
/* Release previous MSIs */
if (msi) {
spapr_irq_free(spapr, msi->first_irq, msi->num);
@@ -1698,7 +1708,14 @@ static void spapr_phb_realize(DeviceState *dev, Error **errp)
uint32_t irq;
Error *local_err = NULL;
- irq = spapr_irq_alloc_block(spapr, 1, true, false, &local_err);
+ irq = spapr_irq_findone(spapr, &local_err);
+ if (local_err) {
+ error_propagate(errp, local_err);
+ error_prepend(errp, "can't allocate LSIs: ");
+ return;
+ }
+
+ spapr_irq_claim(spapr, irq, true, &local_err);
if (local_err) {
error_propagate(errp, local_err);
error_prepend(errp, "can't allocate LSIs: ");